| /openbmc/u-boot/arch/mips/mach-ath79/ar933x/ |
| H A D | lowlevel_init.S | 101 andi t1, t5, 0x10
130 andi t1, t1, 0x02
136 andi t1, t5, 0x01 # t5 BOOT_STRAP
163 andi t1, t5, 0x01 # t5 BOOT_STRAP
177 andi t1, t5, 0x01 # t5 BOOT_STRAP
201 andi t1, t5, 0x01 # t5 BOOT_STRAP
255 andi t1, t1, 0x8
|
| /openbmc/u-boot/arch/powerpc/lib/ |
| H A D | ppcstring.S | 77 andi. r0,r6,3
85 6: andi. r5,r5,3
106 andi. r0,r6,3 /* get dest word aligned */
114 andi. r5,r5,7
148 andi. r0,r6,3
156 andi. r5,r5,7
|
| /openbmc/u-boot/arch/mips/lib/ |
| H A D | cache_init.S | 52 andi \line_sz, \line_sz, (MIPS_CONF1_DL >> MIPS_CONF1_DL_SHF)
60 andi \sz, \sz, (MIPS_CONF1_DA >> MIPS_CONF1_DA_SHF)
68 andi $1, $1, (MIPS_CONF1_DS >> MIPS_CONF1_DS_SHF)
70 andi $1, $1, 0x7
193 andi R_L2_LINE, R_L2_LINE, MIPS_CONF2_SL >> MIPS_CONF2_SL_SHF
199 andi t1, t1, MIPS_CONF2_SA >> MIPS_CONF2_SA_SHF
204 andi t1, t1, MIPS_CONF2_SS >> MIPS_CONF2_SS_SHF
423 andi a0, a0, CONF_CM_CMASK
|
| /openbmc/u-boot/arch/mips/mach-mscc/ |
| H A D | lowlevel_init_luton.S | 25 andi v1, v0, MACRO_CTRL_PLL5G_STATUS_PLL5G_STATUS0_LOCK_STATUS
44 andi v1, v0, MACRO_CTRL_PLL5G_STATUS_PLL5G_STATUS0_LOCK_STATUS
|
| /openbmc/u-boot/arch/nds32/cpu/n1213/ |
| H A D | start.S | 321 andi $p0, $t0, ICAC_MEM_KBF_ISZ
334 andi $p1, $t0, ICAC_MEM_KBF_ISET ! get the ISET field
336 andi $p1, $t0, ICAC_MEM_KBF_IWAY ! get bitfield of Iway
356 andi $p0, $t0, DCAC_MEM_KBF_DSZ
369 andi $p1, $t0, DCAC_MEM_KBF_DSET ! get the DSET field
371 andi $p1, $t0, DCAC_MEM_KBF_DWAY ! get bitfield of D way
515 andi $p0, $p0, 0x3 ! MMPS
|
| /openbmc/u-boot/post/lib_powerpc/ |
| H A D | Makefile | 8 obj-y += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
|
| /openbmc/u-boot/arch/nds32/cpu/n1213/ag101/ |
| H A D | watchdog.S | 21 andi $p1, $p1, 0x1f ! Wipe out useless bits
|
| H A D | lowlevel_init.S | 300 andi $r0, $r0, 1
|
| /openbmc/u-boot/board/imgtec/boston/ |
| H A D | lowlevel_init.S | 30 andi t1, t1, BOSTON_PLAT_DDR3STAT_CALIB
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | release.S | 49 andi. r0,r0,0xff
116 andi. r1,r3,L1CSR1_ICE@l
134 andi. r1,r3,L1CSR0_DCE@l
415 andi. r11,r4,1
|
| H A D | start.S | 316 andi. r3,r3, 0xff
424 andi. r15, r2, MAS2_I|MAS2_G /* save the old I/G for later */
785 andi. r1,r3,L1CSR1_ICE@l
803 andi. r1,r3,L1CSR0_DCE@l
1001 3: andi. r11, r11, L1CSR1_ICUL
1009 3: andi. r11, r11, L1CSR1_ICUL
1140 andi. r2, r2, 0x1ff
1397 andi. r3,r3,L1CSR1_ICE
1428 andi. r3,r3,L1CSR0_DCE
1781 andi. r4,r4,0x1ff
|
| /openbmc/qemu/tests/tcg/riscv64/ |
| H A D | test-mepc-masking.S | 46 andi a0, t1, 3 /* a0 = 0 if both bits masked correctly */
|
| /openbmc/u-boot/arch/mips/mach-mt7620/ |
| H A D | lowlevel_init.S | 75 andi t2, t2, 0x1
196 andi t9, t9, 0x1
210 andi t1, t1, 0x1
|
| /openbmc/qemu/tests/tcg/loongarch64/system/ |
| H A D | boot.S | 41 andi t0, t0, 0x20
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc86xx/ |
| H A D | cache.S | 206 andi. r3, r3, HID0_ICE
273 andi. r3, r3, HID0_DCE
|
| H A D | release.S | 31 andi. r0, r0, 0x0020
|
| /openbmc/u-boot/arch/nds32/cpu/n1213/ae3xx/ |
| H A D | lowlevel_init.S | 135 andi $r0, $r0, 1
|
| /openbmc/u-boot/arch/microblaze/cpu/ |
| H A D | start.S | 195 andi r4, r4, 0xffff
211 andi r3, r3, 0xffff
|
| /openbmc/u-boot/arch/nios2/cpu/ |
| H A D | exceptions.S | 61 andi et, et, 1
|
| /openbmc/u-boot/arch/riscv/cpu/ |
| H A D | start.S | 150 andi t5, t5, 0xFF /* t5 <--- relocation type */
|
| /openbmc/u-boot/arch/mips/cpu/ |
| H A D | start.S | 176 andi t0, (1 << 3)
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | start.S | 111 andi. r0, r3, (MSR_IR | MSR_DR)
196 andi. r6, r6, 1
440 andi. r24,r23,0x3f00 /* get vector offset */
524 andi. r4, r4, 0x4
|
| /openbmc/u-boot/arch/mips/mach-ath79/qca953x/ |
| H A D | lowlevel_init.S | 123 andi t1, t1, 0x02
|
| /openbmc/u-boot/board/imgtec/malta/ |
| H A D | lowlevel_init.S | 34 andi t0, t0, (MALTA_REVISION_CORID_MSK >> \
|
| /openbmc/qemu/target/microblaze/ |
| H A D | insns.decode | 77 andi 101001 ..... ..... ................ @typeb
|