/openbmc/linux/drivers/gpu/drm/i915/ |
H A D | i915_reg_defs.h | 98 #define REG_FIELD_PREP(__mask, __val) \ argument 99 ((u32)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) + \ 100 BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) + \ 101 BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U32_MAX) + \ 102 BUILD_BUG_ON_ZERO(!IS_POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \ 103 …D_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__v… 115 #define REG_FIELD_PREP8(__mask, __val) \ argument 116 ((u8)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) + \ 117 BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) + \ 118 BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U8_MAX) + \ [all …]
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/openbmc/linux/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt2x00reg.h | 206 #define FIELD_CHECK(__mask, __type) \ argument 207 BUILD_BUG_ON(!(__mask) || \ 208 !is_valid_mask(__mask) || \ 209 (__mask) != (__type)(__mask)) \ 211 #define FIELD8(__mask) \ argument 213 FIELD_CHECK(__mask, u8); \ 215 compile_ffs8(__mask), (__mask) \ 219 #define FIELD16(__mask) \ argument 221 FIELD_CHECK(__mask, u16); \ 223 compile_ffs16(__mask), (__mask) \ [all …]
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/openbmc/linux/arch/s390/include/asm/ |
H A D | irqflags.h | 17 unsigned long __mask; \ 20 : "=Q" (__mask) : "i" (__or) : "memory"); \ 21 __mask; \ 27 unsigned long __mask; \ 30 : "=Q" (__mask) : "i" (__and) : "memory"); \ 31 __mask; \
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/openbmc/linux/drivers/pinctrl/spear/ |
H A D | pinctrl-spear.h | 61 #define DEFINE_MUXREG(__pins, __muxreg, __mask, __ste) \ argument 65 .mask = __mask, \ 66 .val = __ste ? __mask : 0, \ 70 #define DEFINE_2_MUXREG(__pins, __muxreg1, __muxreg2, __mask, __ste1, __ste2) \ argument 74 .mask = __mask, \ 75 .val = __ste1 ? __mask : 0, \ 78 .mask = __mask, \ 79 .val = __ste2 ? __mask : 0, \
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/openbmc/linux/arch/riscv/include/asm/ |
H A D | bitops.h | 38 unsigned long __res, __mask; \ 39 __mask = BIT_MASK(nr); \ 43 : "r" (mod(__mask)) \ 45 ((__res & __mask) != 0); \
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/openbmc/u-boot/arch/arm/mach-snapdragon/ |
H A D | misc.c | 17 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \ 25 __res & __mask; \
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/openbmc/linux/drivers/gpu/drm/i2c/ |
H A D | ch7006_priv.h | 141 #define __mask(src, bitfield) \ macro 143 #define mask(bitfield) __mask(bitfield) 146 (((x) >> (src) << (0 ? bitfield)) & __mask(src, bitfield)) 154 ((x & __mask(src, bitfield)) >> (0 ? bitfield) << (src))
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/openbmc/linux/arch/x86/include/asm/ |
H A D | paravirt_types.h | 415 ({ unsigned long __mask = ~0UL; \ 418 case 1: __mask = 0xffUL; break; \ 419 case 2: __mask = 0xffffUL; break; \ 420 case 4: __mask = 0xffffffffUL; break; \ 423 __mask & __eax; \
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/openbmc/sdbusplus/include/sdbusplus/async/stdexec/__detail/ |
H A D | __intrusive_ptr.hpp | 150 constexpr std::size_t __mask = 1ul << _Bit; in __set_bit_() local 151 auto __old = __ref_count_.fetch_or(__mask, std::memory_order_acq_rel); in __set_bit_() 160 constexpr std::size_t __mask = 1ul << _Bit; in __clear_bit_() local 161 auto __old = __ref_count_.fetch_and(~__mask, std::memory_order_acq_rel); in __clear_bit_()
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_display.h | 118 #define for_each_dbuf_slice_in_mask(__dev_priv, __slice, __mask) \ argument 120 for_each_if((__mask) & BIT(__slice)) 226 #define for_each_pipe_masked(__dev_priv, __p, __mask) \ argument 228 for_each_if((__mask) & BIT(__p)) 234 #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ argument 236 for_each_if ((__mask) & BIT(__t))
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H A D | intel_display_power.h | 166 #define for_each_power_domain(__domain, __mask) \ argument 168 for_each_if(test_bit((__domain), (__mask)->bits))
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/openbmc/qemu/target/hexagon/ |
H A D | macros.h | 283 const uint64_t __mask = 0x8000000000000000ULL; \ 284 if (__xor & __mask) { \ 287 else if ((__a ^ __sum) & __mask) { \ 288 if (__sum & __mask) { \
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/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x.h | 97 #define DP(__mask, fmt, ...) \ argument 99 if (unlikely(bp->msg_enable & (__mask))) \ 103 #define DP_AND(__mask, fmt, ...) \ argument 105 if (unlikely((bp->msg_enable & (__mask)) == __mask)) \ 109 #define DP_CONT(__mask, fmt, ...) \ argument 111 if (unlikely(bp->msg_enable & (__mask))) \
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/openbmc/qemu/hw/intc/ |
H A D | apic.c | 214 uint32_t __mask = deliver_bitmask[__i];\ 215 if (__mask) {\ 217 if (__mask & (1U << __j)) {\
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/openbmc/linux/drivers/net/ethernet/smsc/ |
H A D | smc91x.h | 896 int __mask; \ 898 __mask = SMC_inw(ioaddr, INT_REG(lp)) & ~0xff; \ 899 SMC_outw(lp, __mask | (x), ioaddr, INT_REG(lp)); \
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/openbmc/qemu/target/hexagon/imported/ |
H A D | macros.def | 233 const size8u_t __mask = 0x8000000000000000ULL; 234 if (__xor & __mask) { 237 } else if ((__a ^ __sum) & __mask) { 239 if (__sum & __mask) {
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/openbmc/linux/drivers/mmc/core/ |
H A D | sd.c | 62 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \ 70 __res & __mask; \
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H A D | mmc.c | 57 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \ 65 __res & __mask; \
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