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Searched refs:UVD_SUVD_CGC_GATE__SMP_MASK (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v6_0.c663 UVD_SUVD_CGC_GATE__SMP_MASK |
696 UVD_SUVD_CGC_GATE__SMP_MASK |
1286 UVD_SUVD_CGC_GATE__SMP_MASK | in uvd_v6_0_enable_clock_gating()
1411 UVD_SUVD_CGC_GATE__SMP_MASK |
H A Duvd_v5_0.c638 UVD_SUVD_CGC_GATE__SMP_MASK | in uvd_v5_0_enable_clock_gating()
751 UVD_SUVD_CGC_GATE__SMP_MASK |
H A Duvd_v7_0.c1624 UVD_SUVD_CGC_GATE__SMP_MASK |
1697 UVD_SUVD_CGC_GATE__SMP_MASK |
H A Dvcn_v4_0_3.c584 | UVD_SUVD_CGC_GATE__SMP_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v2_0.c557 | UVD_SUVD_CGC_GATE__SMP_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c727 | UVD_SUVD_CGC_GATE__SMP_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v1_0.c532 | UVD_SUVD_CGC_GATE__SMP_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c643 | UVD_SUVD_CGC_GATE__SMP_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c764 | UVD_SUVD_CGC_GATE__SMP_MASK in vcn_v3_0_disable_clock_gating()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h228 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Duvd_6_0_sh_mask.h729 #define UVD_SUVD_CGC_GATE__SMP_MASK 0x4 macro
H A Duvd_5_0_sh_mask.h727 #define UVD_SUVD_CGC_GATE__SMP_MASK 0x4 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h456 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Dvcn_2_5_sh_mask.h2085 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3211 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3756 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2821 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Dvcn_4_0_0_sh_mask.h1338 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro
H A Dvcn_4_0_3_sh_mask.h1338 #define UVD_SUVD_CGC_GATE__SMP_MASK … macro