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Searched refs:UVD_SUVD_CGC_GATE__SIT_HEVC_MASK (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v6_0.c669 UVD_SUVD_CGC_GATE__SIT_HEVC_MASK |
702 UVD_SUVD_CGC_GATE__SIT_HEVC_MASK |
1292 UVD_SUVD_CGC_GATE__SIT_HEVC_MASK | in uvd_v6_0_enable_clock_gating()
H A Dvcn_v4_0_3.c576 | UVD_SUVD_CGC_GATE__SIT_HEVC_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v2_0.c563 | UVD_SUVD_CGC_GATE__SIT_HEVC_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c733 | UVD_SUVD_CGC_GATE__SIT_HEVC_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v1_0.c538 | UVD_SUVD_CGC_GATE__SIT_HEVC_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c649 | UVD_SUVD_CGC_GATE__SIT_HEVC_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c770 | UVD_SUVD_CGC_GATE__SIT_HEVC_MASK in vcn_v3_0_disable_clock_gating()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h234 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Duvd_6_0_sh_mask.h741 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK 0x100 macro
H A Duvd_5_0_sh_mask.h739 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK 0x100 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h462 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Dvcn_2_5_sh_mask.h2091 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Dvcn_2_0_0_sh_mask.h3217 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3762 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2827 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Dvcn_4_0_0_sh_mask.h1344 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro
H A Dvcn_4_0_3_sh_mask.h1344 #define UVD_SUVD_CGC_GATE__SIT_HEVC_MASK … macro