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Searched refs:UVD_SUVD_CGC_GATE__SDB_MASK (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v6_0.c665 UVD_SUVD_CGC_GATE__SDB_MASK |
698 UVD_SUVD_CGC_GATE__SDB_MASK |
1288 UVD_SUVD_CGC_GATE__SDB_MASK | in uvd_v6_0_enable_clock_gating()
1413 UVD_SUVD_CGC_GATE__SDB_MASK;
H A Duvd_v5_0.c640 UVD_SUVD_CGC_GATE__SDB_MASK; in uvd_v5_0_enable_clock_gating()
753 UVD_SUVD_CGC_GATE__SDB_MASK;
H A Duvd_v7_0.c1626 UVD_SUVD_CGC_GATE__SDB_MASK;
1699 UVD_SUVD_CGC_GATE__SDB_MASK;
H A Dvcn_v4_0_3.c586 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v2_0.c559 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c729 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v1_0.c534 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c645 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c766 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v3_0_disable_clock_gating()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h230 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Duvd_6_0_sh_mask.h733 #define UVD_SUVD_CGC_GATE__SDB_MASK 0x10 macro
H A Duvd_5_0_sh_mask.h731 #define UVD_SUVD_CGC_GATE__SDB_MASK 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h458 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Dvcn_2_5_sh_mask.h2087 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Dvcn_2_0_0_sh_mask.h3213 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Dvcn_2_6_0_sh_mask.h3758 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Dvcn_3_0_0_sh_mask.h2823 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Dvcn_4_0_0_sh_mask.h1340 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
H A Dvcn_4_0_3_sh_mask.h1340 #define UVD_SUVD_CGC_GATE__SDB_MASK macro