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Searched refs:UVD_RBC_RB_CNTL__RB_BLKSZ_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h742 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Duvd_4_0_sh_mask.h594 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK 0x00001f00L macro
H A Duvd_4_2_sh_mask.h617 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK 0x1f00 macro
H A Duvd_3_1_sh_mask.h611 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK 0x1f00 macro
H A Duvd_6_0_sh_mask.h681 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK 0x1f00 macro
H A Duvd_5_0_sh_mask.h679 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK 0x1f00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1269 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Dvcn_2_5_sh_mask.h2916 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2887 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3240 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Dvcn_3_0_0_sh_mask.h3996 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4246 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4289 #define UVD_RBC_RB_CNTL__RB_BLKSZ_MASK … macro