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Searched refs:UVD_MPC_SET_MUXB0__VARB_2_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h623 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Duvd_4_0_sh_mask.h516 #define UVD_MPC_SET_MUXB0__VARB_2_MASK 0x0003f000L macro
H A Duvd_4_2_sh_mask.h501 #define UVD_MPC_SET_MUXB0__VARB_2_MASK 0x3f000 macro
H A Duvd_3_1_sh_mask.h497 #define UVD_MPC_SET_MUXB0__VARB_2_MASK 0x3f000 macro
H A Duvd_6_0_sh_mask.h535 #define UVD_MPC_SET_MUXB0__VARB_2_MASK 0x3f000 macro
H A Duvd_5_0_sh_mask.h533 #define UVD_MPC_SET_MUXB0__VARB_2_MASK 0x3f000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1130 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Dvcn_2_5_sh_mask.h2871 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2636 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Dvcn_2_6_0_sh_mask.h2863 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Dvcn_3_0_0_sh_mask.h3944 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4194 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4237 #define UVD_MPC_SET_MUXB0__VARB_2_MASK … macro