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Searched refs:UVD_CGC_UDEC_STATUS__RE_DCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h232 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK 0x00000002L macro
H A Duvd_4_2_sh_mask.h269 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK 0x2 macro
H A Duvd_3_1_sh_mask.h269 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK 0x2 macro
H A Duvd_6_0_sh_mask.h295 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK 0x2 macro
H A Duvd_5_0_sh_mask.h293 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2042 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1994 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3713 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2772 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3890 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3925 #define UVD_CGC_UDEC_STATUS__RE_DCLK_MASK … macro