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Searched refs:UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h215 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0x0000000a macro
H A Duvd_3_1_sh_mask.h288 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
H A Duvd_4_2_sh_mask.h288 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
H A Duvd_6_0_sh_mask.h314 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
H A Duvd_5_0_sh_mask.h312 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2036 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1988 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3707 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2766 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3884 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3919 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro