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Searched refs:UIC_ARG_MIB (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/ufs/host/
H A Dufshcd-dwc.c84 { UIC_ARG_MIB(N_DEVICEID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
86 { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
87 { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
88 { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_LOCAL }, in ufshcd_dwc_connection_setup()
90 { UIC_ARG_MIB(T_CPORTMODE), 1, DME_LOCAL }, in ufshcd_dwc_connection_setup()
93 { UIC_ARG_MIB(N_DEVICEID), 1, DME_PEER }, in ufshcd_dwc_connection_setup()
95 { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_PEER }, in ufshcd_dwc_connection_setup()
96 { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_PEER }, in ufshcd_dwc_connection_setup()
97 { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_PEER }, in ufshcd_dwc_connection_setup()
98 { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_PEER }, in ufshcd_dwc_connection_setup()
[all …]
H A Dcdns-pltfrm.c41 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERDEVICEID), in cdns_ufs_get_l4_attr()
43 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PEERCPORTID), in cdns_ufs_get_l4_attr()
45 ufshcd_dme_get(hba, UIC_ARG_MIB(T_TRAFFICCLASS), in cdns_ufs_get_l4_attr()
47 ufshcd_dme_get(hba, UIC_ARG_MIB(T_PROTOCOLID), in cdns_ufs_get_l4_attr()
49 ufshcd_dme_get(hba, UIC_ARG_MIB(T_CPORTFLAGS), in cdns_ufs_get_l4_attr()
51 ufshcd_dme_get(hba, UIC_ARG_MIB(T_TXTOKENVALUE), in cdns_ufs_get_l4_attr()
53 ufshcd_dme_get(hba, UIC_ARG_MIB(T_RXTOKENVALUE), in cdns_ufs_get_l4_attr()
61 ufshcd_dme_get(hba, UIC_ARG_MIB(T_CPORTMODE), in cdns_ufs_get_l4_attr()
83 ufshcd_dme_set(hba, UIC_ARG_MIB(T_PROTOCOLID), in cdns_ufs_set_l4_attr()
85 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CPORTFLAGS), in cdns_ufs_set_l4_attr()
[all …]
H A Dtc-dwc-g210.c29 { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
30 { UIC_ARG_MIB(CDIRECTCTRL6), 0x80, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
31 { UIC_ARG_MIB(CBDIVFACTOR), 0x08, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
32 { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
33 { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
34 { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
51 { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
52 { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
75 { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
127 { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_20bit_rmmi_lane0()
[all …]
H A Dufs-hisi.c257 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2044), 0x0); in ufs_hisi_link_startup_post_change()
259 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2045), 0x0); in ufs_hisi_link_startup_post_change()
261 ufshcd_dme_set(hba, UIC_ARG_MIB(0x2040), 0x9); in ufs_hisi_link_startup_post_change()
319 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a7), 0xA); in ufs_hisi_pwr_change_pre_change()
321 ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a8), 0xA); in ufs_hisi_pwr_change_pre_change()
328 ufshcd_dme_set(hba, UIC_ARG_MIB(0xD0A0), 0x10); in ufs_hisi_pwr_change_pre_change()
330 ufshcd_dme_set(hba, UIC_ARG_MIB(0x1556), 0x48); in ufs_hisi_pwr_change_pre_change()
334 ufshcd_dme_set(hba, UIC_ARG_MIB(0x15A8), 0x1); in ufs_hisi_pwr_change_pre_change()
336 ufshcd_dme_set(hba, UIC_ARG_MIB(0x155c), 0x0); in ufs_hisi_pwr_change_pre_change()
338 ufshcd_dme_set(hba, UIC_ARG_MIB(0x15b0), SZ_8K - 1); in ufs_hisi_pwr_change_pre_change()
[all …]
H A Dufs-exynos.c235 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in exynosauto_ufs_pre_link()
271 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0); in exynosauto_ufs_pre_link()
275 ufshcd_dme_set(hba, UIC_ARG_MIB(0xa011), 0x8000); in exynosauto_ufs_pre_link()
1040 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), in exynos_ufs_post_link()
1484 ufshcd_dme_set(hba, UIC_ARG_MIB(0x201), 0x12); in fsd_ufs_pre_link()
1485 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in fsd_ufs_pre_link()
1504 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0); in fsd_ufs_pre_link()
1524 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), in fsd_ufs_post_link()
1526 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_HIBERN8TIME), in fsd_ufs_post_link()
1538 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in fsd_ufs_post_link()
[all …]
H A Dufs-sprd.c280 ufshcd_dme_set(hba, UIC_ARG_MIB(CBREFCLKCTRL2), 0x90); in ufs_sprd_n6_phy_init()
281 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCRCTRL), 0x01); in ufs_sprd_n6_phy_init()
286 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
287 ufshcd_dme_set(hba, UIC_ARG_MIB(CBRATESEL), 0x01); in ufs_sprd_n6_phy_init()
295 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGADDRLSB), 0x1c); in ufs_sprd_n6_phy_init()
297 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRLSB), 0x04); in ufs_sprd_n6_phy_init()
298 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGWRMSB), 0x00); in ufs_sprd_n6_phy_init()
299 ufshcd_dme_set(hba, UIC_ARG_MIB(CBCREGRDWRSEL), 0x01); in ufs_sprd_n6_phy_init()
300 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
315 ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in ufs_sprd_n6_phy_init()
[all …]
H A Dufs-mediatek.c128 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); in ufs_mtk_cfg_unipro_cg()
134 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_cfg_unipro_cg()
137 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp); in ufs_mtk_cfg_unipro_cg()
140 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp); in ufs_mtk_cfg_unipro_cg()
143 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); in ufs_mtk_cfg_unipro_cg()
148 UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_cfg_unipro_cg()
151 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp); in ufs_mtk_cfg_unipro_cg()
154 UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp); in ufs_mtk_cfg_unipro_cg()
1025 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), in ufs_mtk_pre_pwr_change()
1028 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXHSADAPTTYPE), in ufs_mtk_pre_pwr_change()
[all …]
H A Dufs-exynos.h252 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OV_TM), true); in exynos_ufs_enable_ov_tm()
257 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OV_TM), false); in exynos_ufs_disable_ov_tm()
262 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), true); in exynos_ufs_enable_dbg_mode()
267 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), false); in exynos_ufs_disable_dbg_mode()
H A Dufshcd-pci.c113 u32 attr = UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE); in ufs_intel_disable_lcc()
174 err = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), in ufs_intel_lkf_pwr_change_notify()
191 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY), &granularity); in ufs_intel_lkf_apply_dev_quirks()
195 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY), &peer_granularity); in ufs_intel_lkf_apply_dev_quirks()
199 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
203 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &peer_pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
210 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE), new_peer_pa_tactivate); in ufs_intel_lkf_apply_dev_quirks()
H A Dufs-qcom.c972 err = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime()
978 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime()
1317 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div()
1329 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div()
1360 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_clk_scale_down_pre_change()
1368 UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), in ufs_qcom_clk_scale_down_pre_change()
/openbmc/linux/drivers/ufs/core/
H A Dufshcd.c3921 UIC_ARG_MIB(PA_TXHSADAPTTYPE), in ufshcd_dme_configure_adapt()
4222 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE); in ufshcd_uic_change_pwr_mode()
4406 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), in ufshcd_get_max_pwr_mode()
4416 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), in ufshcd_get_max_pwr_mode()
4458 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES), in ufshcd_change_power_mode()
4467 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES), in ufshcd_change_power_mode()
4479 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), in ufshcd_change_power_mode()
4483 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), in ufshcd_change_power_mode()
6335 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode); in ufshcd_is_pwr_mode_restore_needed()
8201 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), in ufshcd_tune_pa_tactivate()
[all …]
/openbmc/linux/include/ufs/
H A Dufshci.h305 #define UIC_ARG_MIB(attr) UIC_ARG_MIB_SEL(attr, 0) macro
H A Dufshcd.h1356 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); in ufshcd_disable_host_tx_lcc()