Lines Matching refs:UIC_ARG_MIB
235 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in exynosauto_ufs_pre_link()
271 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0); in exynosauto_ufs_pre_link()
273 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0x0); in exynosauto_ufs_pre_link()
275 ufshcd_dme_set(hba, UIC_ARG_MIB(0xa011), 0x8000); in exynosauto_ufs_pre_link()
286 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 12000); in exynosauto_ufs_pre_pwr_change()
287 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 32000); in exynosauto_ufs_pre_pwr_change()
288 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 16000); in exynosauto_ufs_pre_pwr_change()
325 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_TXPHY_CFGUPDT), 0x1); in exynos7_ufs_pre_link()
327 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), val | (1 << 12)); in exynos7_ufs_pre_link()
328 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_SKIP_RESET_PHY), 0x1); in exynos7_ufs_pre_link()
329 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_SKIP_LINE_RESET), 0x1); in exynos7_ufs_pre_link()
330 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_LINE_RESET_REQ), 0x1); in exynos7_ufs_pre_link()
332 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), val); in exynos7_ufs_pre_link()
352 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_SAVECONFIGTIME), 0xbb8); in exynos7_ufs_post_link()
372 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_RXPHY_CFGUPDT), 0x1); in exynos7_ufs_post_pwr_change()
376 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), 0x1); in exynos7_ufs_post_pwr_change()
486 UIC_ARG_MIB(CMN_PWM_CLK_CTRL), attr->cmn_pwm_clk_ctrl); in exynos_ufs_set_pwm_clk_div()
512 ufshcd_dme_get(hba, UIC_ARG_MIB(CMN_PWM_CLK_CTRL), &clk_idx); in exynos_ufs_calc_pwm_clk_div()
699 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CONNECTIONSTATE), CPORT_IDLE); in exynos_ufs_establish_connt()
702 ufshcd_dme_set(hba, UIC_ARG_MIB(N_DEVICEID), DEV_ID); in exynos_ufs_establish_connt()
703 ufshcd_dme_set(hba, UIC_ARG_MIB(N_DEVICEID_VALID), true); in exynos_ufs_establish_connt()
704 ufshcd_dme_set(hba, UIC_ARG_MIB(T_PEERDEVICEID), PEER_DEV_ID); in exynos_ufs_establish_connt()
705 ufshcd_dme_set(hba, UIC_ARG_MIB(T_PEERCPORTID), PEER_CPORT_ID); in exynos_ufs_establish_connt()
706 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CPORTFLAGS), CPORT_DEF_FLAGS); in exynos_ufs_establish_connt()
707 ufshcd_dme_set(hba, UIC_ARG_MIB(T_TRAFFICCLASS), TRAFFIC_CLASS); in exynos_ufs_establish_connt()
708 ufshcd_dme_set(hba, UIC_ARG_MIB(T_CONNECTIONSTATE), CPORT_CONNECTED); in exynos_ufs_establish_connt()
801 ufshcd_dme_set(hba, UIC_ARG_MIB(DL_FC0PROTTIMEOUTVAL), 8064); in exynos_ufs_pre_pwr_mode()
802 ufshcd_dme_set(hba, UIC_ARG_MIB(DL_TC0REPLAYTIMEOUTVAL), 28224); in exynos_ufs_pre_pwr_mode()
803 ufshcd_dme_set(hba, UIC_ARG_MIB(DL_AFC0REQTIMEOUTVAL), 20160); in exynos_ufs_pre_pwr_mode()
894 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_AVAILRXDATALANES), in exynos_ufs_phy_init()
896 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_AVAILTXDATALANES), in exynos_ufs_phy_init()
927 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_CLK_PERIOD), in exynos_ufs_config_unipro()
929 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTRAILINGCLOCKS), in exynos_ufs_config_unipro()
931 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), in exynos_ufs_config_unipro()
1031 UIC_ARG_MIB(T_DBG_SKIP_INIT_HIBERN8_EXIT), true); in exynos_ufs_post_link()
1035 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_GRANULARITY), in exynos_ufs_post_link()
1040 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), in exynos_ufs_post_link()
1044 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), in exynos_ufs_post_link()
1050 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY), in exynos_ufs_post_link()
1053 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_HIBERN8TIME), in exynos_ufs_post_link()
1058 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 0); in exynos_ufs_post_link()
1277 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &cur_mode); in exynos_ufs_post_hibern8()
1482 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_CLK_PERIOD), in fsd_ufs_pre_link()
1484 ufshcd_dme_set(hba, UIC_ARG_MIB(0x201), 0x12); in fsd_ufs_pre_link()
1485 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in fsd_ufs_pre_link()
1504 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0); in fsd_ufs_pre_link()
1505 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_AUTOMODE_THLD), 0x4E20); in fsd_ufs_pre_link()
1506 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_OPTION_SUITE), 0x2e820183); in fsd_ufs_pre_link()
1507 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0x0); in fsd_ufs_pre_link()
1524 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), in fsd_ufs_post_link()
1526 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_HIBERN8TIME), in fsd_ufs_post_link()
1530 ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE), in fsd_ufs_post_link()
1532 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), max_rx_hibern8_time_cap + 1); in fsd_ufs_post_link()
1534 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), 0x01); in fsd_ufs_post_link()
1535 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_SAVECONFIGTIME), 0xFA); in fsd_ufs_post_link()
1536 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_DBG_MODE), 0x00); in fsd_ufs_post_link()
1538 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40); in fsd_ufs_post_link()
1547 ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0); in fsd_ufs_post_link()
1557 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), 0x1); in fsd_ufs_pre_pwr_change()
1558 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), 0x1); in fsd_ufs_pre_pwr_change()
1559 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 12000); in fsd_ufs_pre_pwr_change()
1560 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 32000); in fsd_ufs_pre_pwr_change()
1561 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 16000); in fsd_ufs_pre_pwr_change()