128 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);  in ufs_mtk_cfg_unipro_cg()
134 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);  in ufs_mtk_cfg_unipro_cg()
137 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp);  in ufs_mtk_cfg_unipro_cg()
140 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp);  in ufs_mtk_cfg_unipro_cg()
143 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);  in ufs_mtk_cfg_unipro_cg()
148 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);  in ufs_mtk_cfg_unipro_cg()
151 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp);  in ufs_mtk_cfg_unipro_cg()
154 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp);  in ufs_mtk_cfg_unipro_cg()
724 	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &ver);  in ufs_mtk_get_controller_version()
1015 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), true);  in ufs_mtk_pre_pwr_change()
1016 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), UFS_HS_G1);  in ufs_mtk_pre_pwr_change()
1018 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), true);  in ufs_mtk_pre_pwr_change()
1019 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), UFS_HS_G1);  in ufs_mtk_pre_pwr_change()
1021 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),  in ufs_mtk_pre_pwr_change()
1023 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),  in ufs_mtk_pre_pwr_change()
1025 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),  in ufs_mtk_pre_pwr_change()
1028 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXHSADAPTTYPE),  in ufs_mtk_pre_pwr_change()
1112 	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);  in ufs_mtk_pre_link()
1118 	ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);  in ufs_mtk_pre_link()
1409 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6);  in ufs_mtk_apply_dev_quirks()
1410 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 10);  in ufs_mtk_apply_dev_quirks()