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Searched refs:TCGv_i32 (Results 1 – 25 of 68) sorted by relevance

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/openbmc/qemu/include/tcg/
H A Dtcg-op-common.h15 TCGv_i32 tcg_constant_i32(int32_t val);
20 TCGv_i32 tcg_temp_new_i32(void);
27 TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t off, const char *name);
82 void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg);
83 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
84 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
85 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
86 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
87 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
88 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
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H A Dtcg-op-gvec-common.h24 typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
30 typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32);
36 typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
42 typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
49 TCGv_ptr, TCGv_i32);
56 TCGv_ptr, TCGv_i32);
62 TCGv_ptr, TCGv_i32);
68 TCGv_ptr, TCGv_ptr, TCGv_i32);
75 TCGv_ptr, TCGv_ptr, TCGv_i32);
87 void (*fni4)(TCGv_i32, TCGv_i32);
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H A Dtcg.h317 typedef struct TCGv_i32_d *TCGv_i32; typedef
599 TCGTemp *tcgv_i32_temp(TCGv_i32 v);
611 static inline TCGTemp *tcgv_i32_temp(TCGv_i32 v) in tcgv_i32_temp()
619 return tcgv_i32_temp((TCGv_i32)v); in tcgv_i64_temp()
624 return tcgv_i32_temp((TCGv_i32)v); in tcgv_i128_temp()
629 return tcgv_i32_temp((TCGv_i32)v); in tcgv_ptr_temp()
634 return tcgv_i32_temp((TCGv_i32)v); in tcgv_vec_temp()
637 static inline TCGArg tcgv_i32_arg(TCGv_i32 v) in tcgv_i32_arg()
662 static inline TCGv_i32 temp_tcgv_i32(TCGTemp *t) in temp_tcgv_i32()
665 return (TCGv_i32)((void *)t - (void *)tcg_ctx); in temp_tcgv_i32()
H A Dtcg-temp-internal.h34 void tcg_temp_free_i32(TCGv_i32 arg);
40 TCGv_i32 tcg_temp_ebb_new_i32(void);
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a32.h32 void load_reg_var(DisasContext *s, TCGv_i32 var, int reg);
36 void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop);
38 void write_neon_element32(TCGv_i32 src, int reg, int ele, MemOp memop);
40 TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs);
41 void gen_set_cpsr(TCGv_i32 var, uint32_t mask);
48 void gen_rev16(TCGv_i32 dest, TCGv_i32 var);
55 static inline TCGv_i32 load_cpu_offset(int offset) in load_cpu_offset()
57 TCGv_i32 tmp = tcg_temp_new_i32(); in load_cpu_offset()
76 void store_cpu_offset(TCGv_i32 var, int offset, int size);
97 static inline TCGv_i32 load_reg(DisasContext *s, int reg) in load_reg()
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H A Dtranslate.h180 TCGv_i32 value;
184 extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF;
352 static inline TCGv_i32 get_ahp_flag(void) in get_ahp_flag()
354 TCGv_i32 ret = tcg_temp_new_i32(); in get_ahp_flag()
365 TCGv_i32 p = tcg_temp_new_i32(); in set_pstate_bits()
377 TCGv_i32 p = tcg_temp_new_i32(); in clear_pstate_bits()
410 static inline void gen_vfp_absh(TCGv_i32 d, TCGv_i32 s)
415 static inline void gen_vfp_abss(TCGv_i32 d, TCGv_i32 in gen_vfp_abss()
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H A Dtranslate-vfp.c41 static inline void vfp_load_reg32(TCGv_i32 var, int reg) in vfp_load_reg32()
46 static inline void vfp_store_reg32(TCGv_i32 var, int reg) in vfp_store_reg32()
51 static inline void vfp_load_reg16(TCGv_i32 var, int reg) in vfp_load_reg16()
159 TCGv_i32 tmp; in gen_update_fp_context()
177 TCGv_i32 control, fpscr; in gen_update_fp_context()
378 TCGv_i32 frn, frm, dest; in trans_VSEL()
379 TCGv_i32 tmp, zero; in trans_VSEL()
434 TCGv_i32 tcg_rmode; in trans_VRINT()
479 TCGv_i32 tcg_op; in trans_VRINT()
480 TCGv_i32 tcg_res; in trans_VRINT()
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H A Dtranslate.c49 static TCGv_i32 cpu_R[16];
50 TCGv_i32 cpu_CF, cpu_NF, cpu_VF, cpu_ZF;
177 void store_cpu_offset(TCGv_i32 var, int offset, int size) in store_cpu_offset()
262 static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, target_long diff) in gen_pc_plus_diff()
273 void load_reg_var(DisasContext *s, TCGv_i32 var, int reg) in load_reg_var()
287 TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs) in add_reg_for_lit()
289 TCGv_i32 tmp = tcg_temp_new_i32(); in add_reg_for_lit()
305 void store_reg(DisasContext *s, int reg, TCGv_i32 var) in store_reg()
330 static void store_sp_checked(DisasContext *s, TCGv_i32 var) in store_sp_checked()
349 void gen_set_cpsr(TCGv_i32 va
3706 op_s_rrr_shi(DisasContext * s,arg_s_rrr_shi * a,void (* gen)(TCGv_i32,TCGv_i32,TCGv_i32),int logic_cc,StoreRegKind kind) op_s_rrr_shi() argument
3724 op_s_rxr_shi(DisasContext * s,arg_s_rrr_shi * a,void (* gen)(TCGv_i32,TCGv_i32),int logic_cc,StoreRegKind kind) op_s_rxr_shi() argument
3746 op_s_rrr_shr(DisasContext * s,arg_s_rrr_shr * a,void (* gen)(TCGv_i32,TCGv_i32,TCGv_i32),int logic_cc,StoreRegKind kind) op_s_rrr_shr() argument
3765 op_s_rxr_shr(DisasContext * s,arg_s_rrr_shr * a,void (* gen)(TCGv_i32,TCGv_i32),int logic_cc,StoreRegKind kind) op_s_rxr_shr() argument
3792 op_s_rri_rot(DisasContext * s,arg_s_rri_rot * a,void (* gen)(TCGv_i32,TCGv_i32,TCGv_i32),int logic_cc,StoreRegKind kind) op_s_rri_rot() argument
3813 op_s_rxi_rot(DisasContext * s,arg_s_rri_rot * a,void (* gen)(TCGv_i32,TCGv_i32),int logic_cc,StoreRegKind kind) op_s_rxi_rot() argument
5701 op_par_addsub(DisasContext * s,arg_rrr * a,void (* gen)(TCGv_i32,TCGv_i32,TCGv_i32)) op_par_addsub() argument
5721 op_par_addsub_ge(DisasContext * s,arg_rrr * a,void (* gen)(TCGv_i32,TCGv_i32,TCGv_i32,TCGv_ptr)) op_par_addsub_ge() argument
5835 op_sat(DisasContext * s,arg_sat * a,void (* gen)(TCGv_i32,TCGv_env,TCGv_i32,TCGv_i32)) op_sat() argument
5884 op_xta(DisasContext * s,arg_rrr_rot * a,void (* gen_extract)(TCGv_i32,TCGv_i32),void (* gen_add)(TCGv_i32,TCGv_i32,TCGv_i32)) op_xta() argument
5885 op_xta(DisasContext * s,arg_rrr_rot * a,void (* gen_extract)(TCGv_i32,TCGv_i32),void (* gen_add)(TCGv_i32,TCGv_i32,TCGv_i32)) op_xta() argument
5965 op_rr(DisasContext * s,arg_rr * a,void (* gen)(TCGv_i32,TCGv_i32)) op_rr() argument
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H A Dgengvec.c122 static void gen_ssra32_i32(TCGv_i32 d, TCGv_i32 a, int32_t shift) in gen_ssra32_i32()
198 static void gen_usra32_i32(TCGv_i32 d, TCGv_i32 a, int32_t shift) in gen_usra32_i32()
292 void gen_srshr32_i32(TCGv_i32 d, TCGv_i32 a, int32_t sh) in gen_srshr32_i32()
294 TCGv_i32 t; in gen_srshr32_i32()
390 static void gen_srsra32_i32(TCGv_i32 d, TCGv_i32 a, int32_t sh) in gen_srsra32_i32()
392 TCGv_i32 t = tcg_temp_new_i32(); in gen_srsra32_i32()
486 void gen_urshr32_i32(TCGv_i32 d, TCGv_i32 a, int32_t sh) in gen_urshr32_i32()
488 TCGv_i32 t; in gen_urshr32_i32()
591 static void gen_ursra32_i32(TCGv_i32 d, TCGv_i32 a, int32_t sh) in gen_ursra32_i32()
593 TCGv_i32 t = tcg_temp_new_i32(); in gen_ursra32_i32()
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H A Dtranslate-m-nocp.c37 TCGv_i32 fptr; in trans_VLLDM_VLSTM()
107 TCGv_i32 aspen, sfpa; in trans_VSCCLRM()
213 typedef void fp_sysreg_storefn(DisasContext *s, void *opaque, TCGv_i32 value,
221 typedef TCGv_i32 fp_sysreg_loadfn(DisasContext *s, void *opaque,
295 TCGv_i32 aspen, fpca; in gen_branch_fpInactive()
310 TCGv_i32 tmp; in gen_M_fp_sysreg_write()
330 TCGv_i32 fpscr; in gen_M_fp_sysreg_write()
334 TCGv_i32 qc = tcg_temp_new_i32(); in gen_M_fp_sysreg_write()
381 TCGv_i32 sfpa, control; in gen_M_fp_sysreg_write()
410 TCGv_i32 vpr; in gen_M_fp_sysreg_write()
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H A Dtranslate-neon.c39 static void neon_load_element(TCGv_i32 var, int reg, int ele, MemOp mop) in neon_load_element()
80 static void neon_store_element(int reg, int ele, MemOp size, TCGv_i32 var) in neon_store_element()
452 TCGv_i32 base; in gen_neon_ldst_base_update()
458 TCGv_i32 index; in gen_neon_ldst_base_update()
474 TCGv_i32 addr; in trans_VLDST_multiple()
575 TCGv_i32 addr, tmp; in trans_VLD_all_lanes()
667 TCGv_i32 addr, tmp; in trans_VLDST_single()
965 static void WRAPNAME(TCGv_i32 d, TCGv_i32 n, TCGv_i32 m) \
1162 TCGv_i32 constimm, rm1, rm2, rm3, rm4; in do_2shift_narrow_32()
1288 TCGv_i32 rm0, rm1; in DO_2SN_64()
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H A Dtranslate-mve.c32 typedef void MVEGenLdStFn(TCGv_ptr, TCGv_ptr, TCGv_i32);
33 typedef void MVEGenLdStSGFn(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
34 typedef void MVEGenLdStIlFn(TCGv_ptr, TCGv_i32, TCGv_i32);
37 typedef void MVEGenTwoOpScalarFn(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
38 typedef void MVEGenTwoOpShiftFn(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
40 typedef void MVEGenVADDVFn(TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_i32);
42 typedef void MVEGenVIDUPFn(TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_i32, TCGv_i32);
43 typedef void MVEGenVIWDUPFn(TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_i32, TCGv_i32, TCGv_i32);
45 typedef void MVEGenScalarCmpFn(TCGv_ptr, TCGv_ptr, TCGv_i32);
46 typedef void MVEGenVABAVFn(TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
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H A Dtranslate-a64.c349 TCGv_i32 tmp; in check_lse2_align()
615 static TCGv_i32 read_fp_sreg(DisasContext *s, int reg) in read_fp_sreg()
617 TCGv_i32 v = tcg_temp_new_i32(); in read_fp_sreg()
623 static TCGv_i32 read_fp_hreg(DisasContext *s, int reg) in read_fp_hreg()
625 TCGv_i32 v = tcg_temp_new_i32(); in read_fp_hreg()
651 static void write_fp_sreg(DisasContext *s, int reg, TCGv_i32 v) in write_fp_sreg()
817 TCGv_i32 t0_32 = tcg_temp_new_i32(); in gen_add32_CC()
818 TCGv_i32 t1_32 = tcg_temp_new_i32(); in gen_add32_CC()
819 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_add32_CC()
867 TCGv_i32 t0_3 in gen_sub32_CC()
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/openbmc/qemu/tcg/
H A Dtcg-op.c110 static void DNI tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) in tcg_gen_op1_i32()
125 static void DNI tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2) in tcg_gen_op2_i32()
135 static void DNI tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3_i32()
136 TCGv_i32 a2, TCGv_i32 a3) in tcg_gen_op3_i32()
147 static void DNI tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, in tcg_gen_op3i_i32()
148 TCGv_i32 a2, TCGArg a3) in tcg_gen_op3i_i32()
159 static void DNI tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, in tcg_gen_ldst_op_i32()
171 static void DNI tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, in tcg_gen_op4_i32()
172 TCGv_i32 a3, TCGv_i32 a4) in tcg_gen_op4_i32()
185 static void DNI tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, in tcg_gen_op4i_i32()
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H A Dtcg-op-ldst.c179 plugin_gen_mem_callbacks_i32(TCGv_i32 val, in plugin_gen_mem_callbacks_i32()
226 static void tcg_gen_qemu_ld_i32_int(TCGv_i32 val, TCGTemp *addr, in tcg_gen_qemu_ld_i32_int()
273 void tcg_gen_qemu_ld_i32_chk(TCGv_i32 val, TCGTemp *addr, TCGArg idx, in tcg_gen_qemu_ld_i32_chk()
281 static void tcg_gen_qemu_st_i32_int(TCGv_i32 val, TCGTemp *addr, in tcg_gen_qemu_st_i32_int()
284 TCGv_i32 swap = NULL; in tcg_gen_qemu_st_i32_int()
330 void tcg_gen_qemu_st_i32_chk(TCGv_i32 val, TCGTemp *addr, TCGArg idx, in tcg_gen_qemu_st_i32_chk()
634 TCGv_i32 t = tcg_temp_ebb_new_i32(); in tcg_gen_qemu_ld_i128_int()
749 TCGv_i32 t = tcg_temp_ebb_new_i32(); in tcg_gen_qemu_st_i128_int()
789 void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc) in tcg_gen_ext_i32()
843 typedef void (*gen_atomic_cx_i32)(TCGv_i32, TCGv_env, TCGv_i64,
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H A Dtcg-op-gvec.c131 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_2_ool()
152 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_2i_ool()
172 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_3_ool()
195 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_4_ool()
221 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_5_ool()
251 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_2_ptr()
272 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_3_ptr()
297 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_4_ptr()
325 TCGv_i32 desc = tcg_constant_i32(simd_desc(oprsz, maxsz, data)); in tcg_gen_gvec_5_ptr()
402 void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in) in tcg_gen_dup_i32()
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H A Dtcg-internal.h58 static inline TCGv_i32 TCGV_LOW(TCGv_i64 t) in TCGV_LOW()
62 static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t) in TCGV_HIGH()
67 TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachable");
68 TCGv_i32 TCGV_HIGH(TCGv_i64) QEMU_ERROR("32-bit code path is reachable");
/openbmc/qemu/target/microblaze/
H A Dtranslate.c49 static TCGv_i32 cpu_R[32];
50 static TCGv_i32 cpu_pc;
51 static TCGv_i32 cpu_msr;
52 static TCGv_i32 cpu_msr_c;
53 static TCGv_i32 cpu_imm;
54 static TCGv_i32 cpu_bvalue;
55 static TCGv_i32 cpu_btarget;
56 static TCGv_i32 cpu_iflags;
58 static TCGv_i32 cpu_res_val;
65 TCGv_i32 r0;
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/openbmc/qemu/target/sparc/
H A Dtranslate.c127 static TCGv_i32 cpu_fprs;
145 static TCGv_i32 cpu_fcc[TARGET_FCCREGS];
165 TCGv_i32 excp;
246 static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src) in gen_load_fpr_F()
248 TCGv_i32 ret = tcg_temp_new_i32(); in gen_load_fpr_F()
253 static void gen_store_fpr_F(DisasContext *dc, unsigned int dst, TCGv_i32 v) in gen_store_fpr_F()
732 static void gen_op_fpack16(TCGv_i32 dst, TCGv_i64 src) in gen_op_fpack16()
741 static void gen_op_fpackfix(TCGv_i32 dst, TCGv_i64 src) in gen_op_fpackfix()
759 static void gen_op_fpadds16s(TCGv_i32 d, TCGv_i32 src1, TCGv_i32 src2) in gen_op_fpadds16s()
761 TCGv_i32 t[2]; in gen_op_fpadds16s()
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/openbmc/qemu/target/xtensa/
H A Dtranslate.c62 TCGv_i32 sar_m32;
70 TCGv_i32 next_icount;
79 static TCGv_i32 cpu_pc;
80 static TCGv_i32 cpu_R[16];
81 static TCGv_i32 cpu_FR[16];
83 static TCGv_i32 cpu_MR[4];
84 static TCGv_i32 cpu_BR[16];
85 static TCGv_i32 cpu_BR4[4];
86 static TCGv_i32 cpu_BR8[2];
87 static TCGv_i32 cpu_SR[256];
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/openbmc/qemu/target/s390x/tcg/
H A Dtranslate.c161 struct { TCGv_i32 a, b; } s32;
187 static TCGv_i32 cc_op;
546 TCGv_i32 local_cc_op = NULL; in gen_op_calc_cc()
1658 static TCGv_i32 fpinst_extract_m34(DisasContext *s, bool m3_with_fpe, in fpinst_extract_m34()
1685 TCGv_i32 m34 = fpinst_extract_m34(s, false, true); in op_cfeb()
1697 TCGv_i32 m34 = fpinst_extract_m34(s, false, true); in op_cfdb()
1709 TCGv_i32 m34 = fpinst_extract_m34(s, false, true); in op_cfxb()
1721 TCGv_i32 m34 = fpinst_extract_m34(s, false, true); in op_cgeb()
1733 TCGv_i32 m34 = fpinst_extract_m34(s, false, true); in op_cgdb()
1745 TCGv_i32 m34 = fpinst_extract_m34(s, false, true); in op_cgxb()
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/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc201 void (*func)(TCGv_ptr, TCGv_i32, TCGv_i32, TCGv_i32))
207 TCGv_i32 vj = tcg_constant_i32(a->vj);
208 TCGv_i32 cd = tcg_constant_i32(a->cd);
209 TCGv_i32 oprsz = tcg_constant_i32(sz);
216 void (*func)(TCGv_ptr, TCGv_i32, TCGv_i32, TCGv_i32))
222 void (*func)(TCGv_ptr, TCGv_i32, TCGv_i3
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/openbmc/qemu/target/ppc/translate/
H A Dspe-impl.c.inc84 TCGv_i32 t0; \
108 TCGv_i32 t0; \
128 static inline void gen_op_evrndw(TCGv_i32 ret, TCGv_i32 arg1)
140 TCGv_i32 t0, t1; \
159 static inline void gen_op_evsrwu(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
163 TCGv_i32 t0 = tcg_temp_new_i32();
175 static inline void gen_op_evsrws(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
179 TCGv_i32 t0 = tcg_temp_new_i32();
191 static inline void gen_op_evslw(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
195 TCGv_i32 t0 = tcg_temp_new_i32();
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/openbmc/qemu/accel/tcg/
H A Dplugin-gen.c103 static TCGv_i32 gen_cpu_index(void) in gen_cpu_index()
105 TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); in gen_cpu_index()
113 TCGv_i32 cpu_index = gen_cpu_index(); in gen_udata_cb()
128 TCGv_i32 cpu_index = gen_cpu_index(); in gen_plugin_u64_ptr()
169 TCGv_i32 cpu_index = gen_cpu_index(); in gen_udata_cond_cb()
206 TCGv_i32 cpu_index = gen_cpu_index(); in gen_mem_cb()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c49 STUB_HELPER(cache, TCGv_env env, TCGv val, TCGv_i32 reg)
1178 static TCGv_i32 hflags;
1179 TCGv_i32 fpu_fcr0, fpu_fcr31;
1237 TCGv_i32 t2 = tcg_temp_new_i32(); in gen_load_srsgpr()
1256 TCGv_i32 t2 = tcg_temp_new_i32(); in gen_store_srsgpr()
1347 void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg) in gen_load_fpr32()
1355 void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg) in gen_store_fpr32()
1366 static void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg) in gen_load_fpr32h()
1375 static void gen_store_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg) in gen_store_fpr32h()
2256 TCGv_i32 fp0 = tcg_temp_new_i32(); in gen_flt_ldst()
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