Lines Matching refs:TCGv_i32
49 static TCGv_i32 cpu_R[16];
50 TCGv_i32 cpu_CF, cpu_NF, cpu_VF, cpu_ZF;
177 void store_cpu_offset(TCGv_i32 var, int offset, int size) in store_cpu_offset()
259 static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, target_long diff) in gen_pc_plus_diff()
270 void load_reg_var(DisasContext *s, TCGv_i32 var, int reg) in load_reg_var()
284 TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs) in add_reg_for_lit()
286 TCGv_i32 tmp = tcg_temp_new_i32(); in add_reg_for_lit()
302 void store_reg(DisasContext *s, int reg, TCGv_i32 var) in store_reg()
327 static void store_sp_checked(DisasContext *s, TCGv_i32 var) in store_sp_checked()
346 void gen_set_cpsr(TCGv_i32 var, uint32_t mask) in gen_set_cpsr()
362 TCGv_i32 tcg_el = tcg_constant_i32(s->current_el); in gen_rebuild_hflags()
405 static void gen_smul_dual(TCGv_i32 a, TCGv_i32 b) in gen_smul_dual()
407 TCGv_i32 tmp1 = tcg_temp_new_i32(); in gen_smul_dual()
408 TCGv_i32 tmp2 = tcg_temp_new_i32(); in gen_smul_dual()
419 void gen_rev16(TCGv_i32 dest, TCGv_i32 var) in gen_rev16()
421 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_rev16()
422 TCGv_i32 mask = tcg_constant_i32(0x00ff00ff); in gen_rev16()
431 static void gen_revsh(TCGv_i32 dest, TCGv_i32 var) in gen_revsh()
443 static void gen_add16(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_add16()
445 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_add16()
455 static inline void gen_logic_CC(TCGv_i32 var) in gen_logic_CC()
462 static void gen_add_carry(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_add_carry()
469 static void gen_sub_carry(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_sub_carry()
477 static void gen_add_CC(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_add_CC()
479 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_add_CC()
490 static void gen_adc_CC(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_adc_CC()
492 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_adc_CC()
515 static void gen_sub_CC(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_sub_CC()
517 TCGv_i32 tmp; in gen_sub_CC()
529 static void gen_sbc_CC(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in gen_sbc_CC()
531 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_sbc_CC()
537 static void gen_##name(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) \
539 TCGv_i32 tmpd = tcg_temp_new_i32(); \
540 TCGv_i32 tmp1 = tcg_temp_new_i32(); \
541 TCGv_i32 zero = tcg_constant_i32(0); \
551 static void gen_sar(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) in GEN_SHIFT()
553 TCGv_i32 tmp1 = tcg_temp_new_i32(); in GEN_SHIFT()
560 static void shifter_out_im(TCGv_i32 var, int shift) in shifter_out_im()
566 static inline void gen_arm_shift_im(TCGv_i32 var, int shiftop, in gen_arm_shift_im()
604 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_arm_shift_im()
614 static inline void gen_arm_shift_reg(TCGv_i32 var, int shiftop, in gen_arm_shift_reg()
615 TCGv_i32 shift, int flags) in gen_arm_shift_reg()
647 TCGv_i32 value; in arm_test_cc()
754 static inline void gen_bx(DisasContext *s, TCGv_i32 var) in gen_bx()
785 static inline void gen_bx_excret(DisasContext *s, TCGv_i32 var) in gen_bx_excret()
839 TCGv_i32 var = load_reg(s, rm); in gen_bxns()
857 TCGv_i32 var = load_reg(s, rm); in gen_blxns()
871 static inline void store_reg_bx(DisasContext *s, int reg, TCGv_i32 var) in store_reg_bx()
884 static inline void store_reg_from_load(DisasContext *s, int reg, TCGv_i32 var) in store_reg_from_load()
917 static TCGv gen_aa32_addr(DisasContext *s, TCGv_i32 a32, MemOp op) in gen_aa32_addr()
933 void gen_aa32_ld_internal_i32(DisasContext *s, TCGv_i32 val, in gen_aa32_ld_internal_i32()
934 TCGv_i32 a32, int index, MemOp opc) in gen_aa32_ld_internal_i32()
940 void gen_aa32_st_internal_i32(DisasContext *s, TCGv_i32 val, in gen_aa32_st_internal_i32()
941 TCGv_i32 a32, int index, MemOp opc) in gen_aa32_st_internal_i32()
948 TCGv_i32 a32, int index, MemOp opc) in gen_aa32_ld_internal_i64()
961 TCGv_i32 a32, int index, MemOp opc) in gen_aa32_st_internal_i64()
975 void gen_aa32_ld_i32(DisasContext *s, TCGv_i32 val, TCGv_i32 a32, in gen_aa32_ld_i32()
981 void gen_aa32_st_i32(DisasContext *s, TCGv_i32 val, TCGv_i32 a32, in gen_aa32_st_i32()
987 void gen_aa32_ld_i64(DisasContext *s, TCGv_i64 val, TCGv_i32 a32, in gen_aa32_ld_i64()
993 void gen_aa32_st_i64(DisasContext *s, TCGv_i64 val, TCGv_i32 a32, in gen_aa32_st_i64()
1000 static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
1001 TCGv_i32 a32, int index) \
1007 static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
1008 TCGv_i32 a32, int index) \
1050 static void gen_exception_el_v(int excp, uint32_t syndrome, TCGv_i32 tcg_el) in gen_exception_el_v()
1068 int excp, uint32_t syn, TCGv_i32 tcg_el) in gen_exception_insn_el_v()
1182 void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop) in read_neon_element32()
1227 void write_neon_element32(TCGv_i32 src, int reg, int ele, MemOp memop) in write_neon_element32()
1274 static inline TCGv_i32 iwmmxt_load_creg(int reg) in iwmmxt_load_creg()
1276 TCGv_i32 var = tcg_temp_new_i32(); in iwmmxt_load_creg()
1281 static inline void iwmmxt_store_creg(int reg, TCGv_i32 var) in iwmmxt_store_creg()
1396 TCGv_i32 tmp; in IWMMXT_OP()
1404 TCGv_i32 tmp; in gen_op_iwmmxt_set_cup()
1412 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_op_iwmmxt_setpsr_nz()
1425 TCGv_i32 dest) in gen_iwmmxt_address()
1429 TCGv_i32 tmp; in gen_iwmmxt_address()
1458 static inline int gen_iwmmxt_shift(uint32_t insn, uint32_t mask, TCGv_i32 dest) in gen_iwmmxt_shift()
1461 TCGv_i32 tmp; in gen_iwmmxt_shift()
1485 TCGv_i32 addr; in disas_iwmmxt_insn()
1486 TCGv_i32 tmp, tmp2, tmp3; in disas_iwmmxt_insn()
2457 TCGv_i32 tmp, tmp2; in disas_dsp_insn()
2603 static inline void gen_mulxy(TCGv_i32 t0, TCGv_i32 t1, int x, int y) in gen_mulxy()
2650 static int gen_set_psr(DisasContext *s, uint32_t mask, int spsr, TCGv_i32 t0) in gen_set_psr()
2652 TCGv_i32 tmp; in gen_set_psr()
2673 TCGv_i32 tmp; in gen_set_psr_im()
2799 TCGv_i32 tcg_el; in msr_banked_access_decode()
2849 TCGv_i32 tcg_reg; in gen_msr_banked()
2868 TCGv_i32 tcg_reg; in gen_mrs_banked()
2890 static void store_pc_exc_ret(DisasContext *s, TCGv_i32 pc) in store_pc_exc_ret()
2896 static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr) in gen_rfe()
2910 static void gen_exception_return(DisasContext *s, TCGv_i32 pc) in gen_exception_return()
2992 TCGv_i32 t; in do_coproc_insn()
3109 TCGv_i32 tmp; in do_coproc_insn()
3129 TCGv_i32 tmp; in do_coproc_insn()
3158 TCGv_i32 tmplo, tmphi; in do_coproc_insn()
3172 TCGv_i32 tmp = load_reg(s, rt); in do_coproc_insn()
3223 TCGv_i32 tmp; in gen_storeq_reg()
3236 TCGv_i32 tmpl; in gen_addq()
3237 TCGv_i32 tmph; in gen_addq()
3248 static void gen_logicq_cc(TCGv_i32 lo, TCGv_i32 hi) in gen_logicq_cc()
3261 TCGv_i32 addr, int size) in gen_load_exclusive()
3263 TCGv_i32 tmp = tcg_temp_new_i32(); in gen_load_exclusive()
3269 TCGv_i32 tmp2 = tcg_temp_new_i32(); in gen_load_exclusive()
3305 TCGv_i32 addr, int size) in gen_store_exclusive()
3307 TCGv_i32 t0, t1, t2; in gen_store_exclusive()
3383 TCGv_i32 addr, tmp; in gen_srs()
3635 static void gen_rsb(TCGv_i32 dst, TCGv_i32 a, TCGv_i32 b) in gen_rsb()
3640 static void gen_rsb_CC(TCGv_i32 dst, TCGv_i32 a, TCGv_i32 b) in gen_rsb_CC()
3645 static void gen_rsc(TCGv_i32 dest, TCGv_i32 a, TCGv_i32 b) in gen_rsc()
3650 static void gen_rsc_CC(TCGv_i32 dest, TCGv_i32 a, TCGv_i32 b) in gen_rsc_CC()
3673 TCGv_i32 val, StoreRegKind kind) in store_reg_kind()
3703 void (*gen)(TCGv_i32, TCGv_i32, TCGv_i32), in op_s_rrr_shi() argument
3706 TCGv_i32 tmp1, tmp2; in op_s_rrr_shi()
3721 void (*gen)(TCGv_i32, TCGv_i32), in op_s_rxr_shi() argument
3724 TCGv_i32 tmp; in op_s_rxr_shi()
3743 void (*gen)(TCGv_i32, TCGv_i32, TCGv_i32), in op_s_rrr_shr() argument
3746 TCGv_i32 tmp1, tmp2; in op_s_rrr_shr()
3762 void (*gen)(TCGv_i32, TCGv_i32), in op_s_rxr_shr() argument
3765 TCGv_i32 tmp1, tmp2; in op_s_rxr_shr()
3789 void (*gen)(TCGv_i32, TCGv_i32, TCGv_i32), in op_s_rri_rot() argument
3792 TCGv_i32 tmp1; in op_s_rri_rot()
3810 void (*gen)(TCGv_i32, TCGv_i32), in op_s_rxi_rot() argument
3813 TCGv_i32 tmp; in op_s_rxi_rot()
3959 TCGv_i32 tmp; in trans_MOVT()
3979 TCGv_i32 rdalo, rdahi; in do_mve_shl_ri()
4064 TCGv_i32 rdalo, rdahi; in do_mve_shl_rr()
4161 static void gen_mve_sqshl(TCGv_i32 r, TCGv_i32 n, int32_t shift) in gen_mve_sqshl()
4171 static void gen_mve_uqshl(TCGv_i32 r, TCGv_i32 n, int32_t shift) in gen_mve_uqshl()
4217 TCGv_i32 t1, t2; in op_mla()
4245 TCGv_i32 t1, t2; in trans_MLS()
4261 TCGv_i32 t0, t1, t2, t3; in op_mlal()
4305 TCGv_i32 t0, t1, t2, zero; in trans_UMAAL()
4332 TCGv_i32 t0, t1; in op_qaddsub()
4374 TCGv_i32 t0, t1, tl, th; in DO_QADDSUB()
4436 TCGv_i32 t0, t1; in op_smlawx()
4563 TCGv_i32 t1, t2, t3; in op_crc32()
4630 TCGv_i32 tmp; in trans_MRS_reg()
4651 TCGv_i32 tmp; in trans_MSR_reg()
4666 TCGv_i32 tmp; in trans_MRS_v7m()
4679 TCGv_i32 addr, reg; in trans_MSR_v7m()
4726 TCGv_i32 tmp; in trans_BLX_r()
4765 TCGv_i32 tmp; in trans_CLZ()
4778 TCGv_i32 tmp; in trans_ERET()
4876 TCGv_i32 addr, tmp; in trans_TT()
4920 static TCGv_i32 op_addr_rr_pre(DisasContext *s, arg_ldst_rr *a) in op_addr_rr_pre()
4922 TCGv_i32 addr = load_reg(s, a->rn); in op_addr_rr_pre()
4929 TCGv_i32 ofs = load_reg(s, a->rm); in op_addr_rr_pre()
4941 TCGv_i32 addr, int address_offset) in op_addr_rr_post()
4944 TCGv_i32 ofs = load_reg(s, a->rm); in op_addr_rr_post()
4962 TCGv_i32 addr, tmp; in op_load_rr()
4983 TCGv_i32 addr, tmp; in op_store_rr()
5006 TCGv_i32 addr, tmp; in trans_LDRD_rr()
5035 TCGv_i32 addr, tmp; in trans_STRD_rr()
5062 static TCGv_i32 op_addr_ri_pre(DisasContext *s, arg_ldst_ri *a) in op_addr_ri_pre()
5078 TCGv_i32 newsp = tcg_temp_new_i32(); in op_addr_ri_pre()
5090 TCGv_i32 addr, int address_offset) in op_addr_ri_post()
5109 TCGv_i32 addr, tmp; in op_load_ri()
5130 TCGv_i32 addr, tmp; in op_store_ri()
5153 TCGv_i32 addr, tmp; in op_ldrd_ri()
5192 TCGv_i32 addr, tmp; in op_strd_ri()
5261 TCGv_i32 addr, tmp; in DO_LDST()
5291 TCGv_i32 addr; in op_strex()
5410 TCGv_i32 addr, tmp; in op_stl()
5447 TCGv_i32 addr; in op_ldrex()
5564 TCGv_i32 addr, tmp; in op_lda()
5606 TCGv_i32 t1, t2; in trans_USADA8()
5625 TCGv_i32 tmp; in op_bfx()
5661 TCGv_i32 t_in, t_rd; in trans_BFCI()
5698 void (*gen)(TCGv_i32, TCGv_i32, TCGv_i32)) in op_par_addsub() argument
5700 TCGv_i32 t0, t1; in op_par_addsub()
5718 void (*gen)(TCGv_i32, TCGv_i32, in op_par_addsub_ge() argument
5719 TCGv_i32, TCGv_ptr)) in op_par_addsub_ge()
5721 TCGv_i32 t0, t1; in op_par_addsub_ge()
5804 TCGv_i32 tn, tm; in DO_PAR_ADDSUB_GE()
5832 void (*gen)(TCGv_i32, TCGv_env, TCGv_i32, TCGv_i32)) in op_sat() argument
5834 TCGv_i32 tmp; in op_sat()
5881 void (*gen_extract)(TCGv_i32, TCGv_i32), in op_xta() argument
5882 void (*gen_add)(TCGv_i32, TCGv_i32, TCGv_i32)) in op_xta() argument
5884 TCGv_i32 tmp; in op_xta()
5899 TCGv_i32 tmp2 = load_reg(s, a->rn); in op_xta()
5944 TCGv_i32 t1, t2, t3; in trans_SEL()
5962 void (*gen)(TCGv_i32, TCGv_i32)) in op_rr() argument
5964 TCGv_i32 tmp; in op_rr()
6010 TCGv_i32 t1, t2; in op_smlad()
6047 TCGv_i32 t3, qf, one; in op_smlad()
6097 TCGv_i32 t1, t2; in op_smlald()
6149 TCGv_i32 t1, t2; in op_smmla()
6162 TCGv_i32 t3 = load_reg(s, a->ra); in op_smmla()
6208 TCGv_i32 t1, t2; in op_div()
6241 static TCGv_i32 op_addr_block_pre(DisasContext *s, arg_ldst_block *a, int n) in op_addr_block_pre()
6243 TCGv_i32 addr = load_reg(s, a->rn); in op_addr_block_pre()
6277 TCGv_i32 addr, int n) in op_addr_block_post()
6301 TCGv_i32 addr, tmp; in op_stm()
6376 TCGv_i32 addr, tmp, loaded_var; in do_ldm()
6495 TCGv_i32 zero; in trans_CLRM()
6592 TCGv_i32 tmp = tcg_temp_new_i32(); in trans_BL_suffix()
6603 TCGv_i32 tmp; in trans_BLX_suffix()
6640 TCGv_i32 tmp; in trans_DLS()
6678 TCGv_i32 tmp; in trans_WLS()
6757 TCGv_i32 tmp; in trans_LE()
6841 TCGv_i32 decr = tcg_temp_new_i32(); in trans_LE()
6842 TCGv_i32 ltpsize = load_cpu_field(v7m.ltpsize); in trans_LE()
6890 TCGv_i32 rn_shifted, masklen; in trans_VCTP()
6920 TCGv_i32 addr, tmp; in op_tbranch()
6950 TCGv_i32 tmp = load_reg(s, a->rn); in trans_CBZ()
6997 TCGv_i32 addr, t1, t2; in trans_RFE()
7075 TCGv_i32 tmp, addr; in trans_CPS_v7m()
7214 TCGv_i32 rn, rm; in trans_CSEL()