Lines Matching refs:TCGv_i32
32 void load_reg_var(DisasContext *s, TCGv_i32 var, int reg);
36 void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop);
38 void write_neon_element32(TCGv_i32 src, int reg, int ele, MemOp memop);
40 TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs);
41 void gen_set_cpsr(TCGv_i32 var, uint32_t mask);
48 void gen_rev16(TCGv_i32 dest, TCGv_i32 var);
55 static inline TCGv_i32 load_cpu_offset(int offset) in load_cpu_offset()
57 TCGv_i32 tmp = tcg_temp_new_i32(); in load_cpu_offset()
76 void store_cpu_offset(TCGv_i32 var, int offset, int size);
90 static inline TCGv_i32 load_reg(DisasContext *s, int reg) in load_reg()
92 TCGv_i32 tmp = tcg_temp_new_i32(); in load_reg()
97 void store_reg(DisasContext *s, int reg, TCGv_i32 var);
99 void gen_aa32_ld_internal_i32(DisasContext *s, TCGv_i32 val,
100 TCGv_i32 a32, int index, MemOp opc);
101 void gen_aa32_st_internal_i32(DisasContext *s, TCGv_i32 val,
102 TCGv_i32 a32, int index, MemOp opc);
104 TCGv_i32 a32, int index, MemOp opc);
106 TCGv_i32 a32, int index, MemOp opc);
107 void gen_aa32_ld_i32(DisasContext *s, TCGv_i32 val, TCGv_i32 a32,
109 void gen_aa32_st_i32(DisasContext *s, TCGv_i32 val, TCGv_i32 a32,
111 void gen_aa32_ld_i64(DisasContext *s, TCGv_i64 val, TCGv_i32 a32,
113 void gen_aa32_st_i64(DisasContext *s, TCGv_i64 val, TCGv_i32 a32,
117 static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
118 TCGv_i32 a32, int index) \
124 static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
125 TCGv_i32 a32, int index) \
131 TCGv_i32 a32, int index) in gen_aa32_ld64()
137 TCGv_i32 a32, int index) in gen_aa32_st64()
162 static inline void gen_swap_half(TCGv_i32 dest, TCGv_i32 var) in gen_swap_half()