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Searched refs:SCC (Results 1 – 25 of 36) sorted by relevance

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/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dfsl-imx-scc.yaml7 title: Freescale Security Controller (SCC)
21 - description: SCC SCM interrupt
22 - description: SCC SMN interrupt
/openbmc/u-boot/doc/
H A DREADME.serial_multi7 At the moment, the ports must be split on a SMC and a SCC port on a
15 - SCC if keys pressed (modem enabled)
17 *) The console can be switched to SCC by any of the following commands:
37 After that press 'enter' at the SCC console. Note that baudrates <38400
H A DREADME.POST298 enet - SCC/FCC ethernet test
701 o) Serial Communication Controllers (SCC)
703 2.2.3.1. Ethernet tests (SCC)
705 The internal (local) loopback mode will be used to test SCC. To do
711 The test routines for the SCC ethernet tests will be located in
714 2.2.3.2. UART tests (SMC/SCC)
717 used. The SMC/SCC controllers will be configured to connect the
723 The test routine for the SMC/SCC UART tests will be located in
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dvexpress-scc.txt4 Test chips for ARM Versatile Express platform implement SCC (Serial
23 - reg: when the SCC is memory mapped, physical address and size of the
25 - interrupts: when the SCC can generate a system-level interrupt
/openbmc/qemu/docs/system/arm/
H A Dmps2.rst47 SCC CFG_REG0 memory-remap bit)
56 the SCC CFG_REG0 register.
58 interfaces via the SCC CFG_REG1 register.
60 base address via the SCC CFG_REG6 and CFG_REG7 register config,
66 held in halt via the initial SCC CFG_REG0 register setting. You can
H A Dmusca.rst18 - SCC
H A Dvexpress.rst36 - SCC
/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-scc-qmc.yaml26 - description: SCC (Serial communication controller) register base
27 - description: SCC parameter ram base
38 description: SCC interrupt line in the CPM interrupt controller
/openbmc/linux/Documentation/networking/device_drivers/hamradio/
H A Dz8530drv.rst5 SCC.C - Linux driver for Z8530 based HDLC cards for AX.25
116 SCC type value
118 PA0HZP SCC card PA0HZP
122 BayCom (U)SCC card BAYCOM
160 # SCC chip 2
307 (1) this divider is usually mounted on the SCC-PBC (PA0HZP) or not
368 3.1 Displaying SCC Parameters:
371 Once a SCC channel has been attached, the parameter settings and
434 same way in the SCC driver. You can change parameters by using
500 byte of a packet has been transferred to the SCC. This is
[all …]
/openbmc/linux/drivers/net/hamradio/
H A DKconfig48 config SCC config
49 tristate "Z8530 SCC driver"
65 depends on SCC
67 Say Y here if you experience problems with the SCC driver not
76 depends on SCC
/openbmc/linux/arch/powerpc/include/asm/
H A Dhydra.h47 char SCC[0x1000]; member
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/images/
H A Dsdcard-image-n1sdp_0.1.bb42 …sed -i -e 's|.*SOCCON: 0x1170.*PLATFORM_CTRL.*|SOCCON: 0x1170 0x00000100 ;SoC SCC PLATFORM_CTRL|…
63 …sed -i -e 's|.*SOCCON: 0x1170.*PLATFORM_CTRL.*|SOCCON: 0x1170 0x00000101 ;SoC SCC PLATFORM_CTRL|…
/openbmc/linux/arch/m68k/include/asm/
H A Datarihw.h96 ATARIHW_DECLARE(SCC); /* Serial Communications Contr. */
442 struct SCC struct
452 # define atari_scc ((*(volatile struct SCC*)SCC_BAS)) argument
455 # define st_escc ((*(volatile struct SCC*)0xfffffa31))
/openbmc/linux/drivers/net/ethernet/freescale/fs_enet/
H A DKconfig13 bool "Chip has an SCC usable for ethernet"
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dti,cdce925.yaml73 SCC range.
/openbmc/linux/net/ax25/
H A DKconfig33 one of the various SCC cards that are supported by the generic Z8530
34 or the DMA SCC driver. Another option are the Baycom modem serial
/openbmc/linux/arch/m68k/atari/
H A Dconfig.c317 ATARIHW_SET(SCC); in config_atari()
640 ATARIHW_ANNOUNCE(SCC, "Serial Communications Controller SCC 8530"); in atari_get_hardware_list()
H A Dataints.c297 if (ATARIHW_PRESENT(SCC) && !atari_SCC_reset_done) { in atari_init_IRQ()
/openbmc/qemu/hw/net/
H A De1000_common.h44 defreg(TADV), defreg(ITR), defreg(SCC), defreg(ECOL),
H A Digb_common.h69 defreg(SCC), defreg(ECOL),
/openbmc/qemu/hw/misc/
H A Dtrace-events102 mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " d…
103 mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 "…
104 mps2_scc_reset(void) "MPS2 SCC: reset"
105 mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: func…
106 mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: functi…
/openbmc/openbmc/poky/documentation/kernel-dev/
H A Dadvanced.rst885 SCC Description File Reference
889 within an SCC description file (``.scc``):
901 - ``include SCC_FILE``: Includes an SCC file in the current file. The
/openbmc/linux/drivers/tty/serial/
H A DKconfig764 tristate "CPM SCC/SMC serial port support"
768 This driver supports the SCC and SMC serial ports on Motorola
772 bool "Support for console on CPM SCC/SMC serial port"
776 Say Y here if you wish to use a SCC or SMC CPM UART as the system
/openbmc/linux/Documentation/block/
H A Ddata-integrity.rst16 protocols (SBC Data Integrity Field, SCC protection proposal) as well
/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dmac.c352 er32(SCC); in e1000e_clear_hw_cntrs_base()

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