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Searched refs:MPC85xx_L2CTL_L2E (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/powerpc/platforms/85xx/
H A Dxes_mpc85xx.c36 #define MPC85xx_L2CTL_L2E 0x80000000 /* L2 enable */ macro
61 ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I; in xes_mpc85xx_configure_l2()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu_init_early.c148 (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); in cpu_init_early_f()
168 (MPC85xx_L2CTL_L2E | in cpu_init_early_f()
H A Dspl_minimal.c27 (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); in cpu_init_f()
H A Dcpu_init.c603 if (cache_ctl & MPC85xx_L2CTL_L2E) { in l2cache_init()
615 (MPC85xx_L2CTL_L2E | in l2cache_init()
657 if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { in l2cache_init()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h320 #define MPC85xx_L2CTL_L2E 0x80000000 macro