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/openbmc/u-boot/doc/
H A DREADME.Heterogeneous-SoCs1 DSP side awareness for Freescale heterogeneous multicore chips based on
7 SC3900/DSP cores and such devices like CPRI, MAPLE, MAPLE-ULB etc.
9 Code for DSP side awareness provides such functionality for Freescale
19 Code added in this file to print the DSP cores and other device's(CPRI,
35 in the system and CONFIGS for SC3900/DSP components
50 DSP/SC3900 core clusters
73 DSP cores and other device's components have been added in this structure.
75 freq_processor_dsp[CONFIG_MAX_DSP_CPUS] - Array to contain the DSP core's frequencies
91 DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
92 DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
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H A DREADME.davinci9 Additionally, some family members contain a TI DSP and/or graphics
H A DREADME.omap37 some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A DREADME4 It combines Power Architecture e500v2 and DSP StarCore SC3850 core
11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
104 0xA0000000 0xBFFFFFFF Shared DSP core L2/M2 space 512M
109 0xFEE0_0000 0xFEE0_0FFF DSP Boot ROM 4K
110 0xFF60_0000 0xFF6F_FFFF DSP CCSR 1M
117 0x3700_0000 0x37FF_FFFF PowerPC-DSP shared control area
118 0x3800_0000 0x4FFF_FFFF DSP Private area
121 data communcation between PowerPC and DSP core.
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME6 The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850
17 - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
109 0xA000_0000 0xA7FF_FFFF DSP core1 L2 space 128M
110 0xB000_0000 0xB0FF_FFFF DSP core0 M2 space 16M
111 0xB100_0000 0xB1FF_FFFF DSP core1 M2 space 16M
118 0xFEE0_0000 0xFEE0_0FFF DSP Boot ROM 4K
119 0xFF60_0000 0xFF6F_FFFF DSP CCSR 1M
/openbmc/openbmc/poky/meta/recipes-multimedia/speex/
H A Dspeexdsp_1.2.1.bb1 SUMMARY = "A patent-free DSP library"
2 DESCRIPTION = "SpeexDSP is a patent-free, Open Source/Free Software DSP library."
/openbmc/openbmc/poky/meta/conf/machine/include/arm/
H A Darch-armv5-dsp.inc3 TUNEVALID[dsp] = "ARM DSP functionality"
16 # Little Endian + VFP/DSP
40 # Big Endian + VFP/DSP
H A Dfeature-arm-dsp.inc2 TUNEVALID[dsp] = "ARM DSP functionality"
H A Darch-armv5.inc20 # Little Endian + VFP/DSP
44 # Big Endian + VFP/DSP
H A DREADME28 ARMPKGSFX_DSP - This is the DSP specific suffix. Currently this is set
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dprocessor.hpp15 DSP, enumerator
128 {ProcessorType::DSP, "DSP"},
H A Dport.hpp146 DSP, enumerator
328 {CurrentPortConfigurationState::DSP, "DSP"},
/openbmc/u-boot/drivers/firmware/
H A DKconfig18 compute systems such as ARM, DSP etc with the system controller in
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-benchmark/linpack/linpack/
H A D0001-linpack-Define-DP-only-when-SP-is-not-defined.patch7 passing -DSP on compile cmdline
/openbmc/openbmc/poky/meta/conf/machine/include/arm/armv8-m/
H A Dtune-cortexm35p.inc11 # GCC thnks that DSP and VFP are required, but Arm docs say it is
H A Dtune-cortexm33.inc11 # GCC thnks that DSP and VFP are required, but Arm docs say it is
/openbmc/qemu/docs/system/arm/
H A Dmusca.rst27 asymmetric: CPU 0 does not have the FPU or DSP extensions,
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-benchmark/linpack/
H A Dlinpack_1.0.bb18 ${CC} ${CFLAGS} ${LDFLAGS} -DSP -o linpack_sp linpacknew.c -lm
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/spandsp/
H A Dspandsp_git.bb1 SUMMARY = "A DSP library for telephony"
/openbmc/openbmc/poky/meta/conf/machine/include/mips/
H A Dtune-mips-24k.inc11 TUNEVALID[24kec] = "Enable MIPS 24KEc processor optimizations, including DSP"
/openbmc/u-boot/include/
H A Dsym53c8xx.h129 #define DSP 0x2c /* --> Script Pointer */ macro
/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc40 /* No config4, no DSP ASE, no large physaddr (PABITS),
217 /* No DSP implemented. */
239 /* we have a DSP, but no FPU */
261 /* No DSP implemented. */
964 /* A generic CPU providing MIPS64 DSP R2 ASE features.
/openbmc/docs/designs/
H A Dredfish-tls-user-authentication.md29 - [DSP-IS0008 DMTF's Redfish Certificate Management Document](https://www.dmtf.org/dsp/DSP-IS0008)
/openbmc/u-boot/arch/arm/dts/
H A Ddra71-evm.dts77 /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
/openbmc/u-boot/board/Barix/ipam390/
H A Dipam390-ais-uart.cfg183 ; for starting the DDR2 interface on DSP-boot D800K002 devices.

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