141d91011SPrabhakar KushwahaOverview 241d91011SPrabhakar Kushwaha-------- 341d91011SPrabhakar Kushwaha The BSC9132 is a highly integrated device that targets the evolving 441d91011SPrabhakar Kushwaha Microcell, Picocell, and Enterprise-Femto base station market subsegments. 541d91011SPrabhakar Kushwaha 641d91011SPrabhakar Kushwaha The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850 741d91011SPrabhakar Kushwaha core technologies with MAPLE-B2P baseband acceleration processing elements 841d91011SPrabhakar Kushwaha to address the need for a high performance, low cost, integrated solution 941d91011SPrabhakar Kushwaha that handles all required processing layers without the need for an 1041d91011SPrabhakar Kushwaha external device except for an RF transceiver or, in a Micro base station 1141d91011SPrabhakar Kushwaha configuration, a host device that handles the L3/L4 and handover between 1241d91011SPrabhakar Kushwaha sectors. 1341d91011SPrabhakar Kushwaha 1441d91011SPrabhakar Kushwaha The BSC9132 SoC includes the following function and features: 1541d91011SPrabhakar Kushwaha - Power Architecture subsystem including two e500 processors with 1641d91011SPrabhakar Kushwaha 512-Kbyte shared L2 cache 1741d91011SPrabhakar Kushwaha - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2 1841d91011SPrabhakar Kushwaha cache 1941d91011SPrabhakar Kushwaha - 32 Kbyte of shared M3 memory 2041d91011SPrabhakar Kushwaha - The Multi Accelerator Platform Engine for Pico BaseStation Baseband 2141d91011SPrabhakar Kushwaha Processing (MAPLE-B2P) 2241d91011SPrabhakar Kushwaha - Two DDR3/3L memory interfaces with 32-bit data width (40 bits including 2341d91011SPrabhakar Kushwaha ECC), up to 1333 MHz data rate 2441d91011SPrabhakar Kushwaha - Dedicated security engine featuring trusted boot 2541d91011SPrabhakar Kushwaha - Two DMA controllers 2641d91011SPrabhakar Kushwaha - OCNDMA with four bidirectional channels 2741d91011SPrabhakar Kushwaha - SysDMA with sixteen bidirectional channels 2841d91011SPrabhakar Kushwaha - Interfaces 2941d91011SPrabhakar Kushwaha - Four-lane SerDes PHY 3041d91011SPrabhakar Kushwaha - PCI Express controller complies with the PEX Specification-Rev 2.0 3141d91011SPrabhakar Kushwaha - Two Common Public Radio Interface (CPRI) controller lanes 3241d91011SPrabhakar Kushwaha - High-speed USB 2.0 host and device controller with ULPI interface 3341d91011SPrabhakar Kushwaha - Enhanced secure digital (SD/MMC) host controller (eSDHC) 3441d91011SPrabhakar Kushwaha - Antenna interface controller (AIC), supporting four industry 3541d91011SPrabhakar Kushwaha standard JESD207/four custom ADI RF interfaces 3641d91011SPrabhakar Kushwaha - ADI lanes support both full duplex FDD support & half duplex TDD 3741d91011SPrabhakar Kushwaha - Universal Subscriber Identity Module (USIM) interface that 3841d91011SPrabhakar Kushwaha facilitates communication to SIM cards or Eurochip pre-paid phone 3941d91011SPrabhakar Kushwaha cards 4041d91011SPrabhakar Kushwaha - Two DUART, two eSPI, and two I2C controllers 4141d91011SPrabhakar Kushwaha - Integrated Flash memory controller (IFC) 4241d91011SPrabhakar Kushwaha - GPIO 4341d91011SPrabhakar Kushwaha - Sixteen 32-bit timers 4441d91011SPrabhakar Kushwaha 4541d91011SPrabhakar KushwahaThe SC3850 core subsystem consists of the following: 4641d91011SPrabhakar Kushwaha - 32 KB, 8-way, level 1 instruction cache (L1 ICache) 4741d91011SPrabhakar Kushwaha - 32 KB, 8-way, level 1 data cache (L1 DCache) 4841d91011SPrabhakar Kushwaha - 512 KB, 8-way, level 2 unified instruction/data cache (L2 cache/M2 memory) 4941d91011SPrabhakar Kushwaha - Memory management unit (MMU) 5041d91011SPrabhakar Kushwaha - Global interrupt controller ( GIC) 5141d91011SPrabhakar Kushwaha - Debug and profiling unit (DPU) 5241d91011SPrabhakar Kushwaha - Two 32-bit quad timers 5341d91011SPrabhakar Kushwaha 5441d91011SPrabhakar KushwahaBSC9132QDS board Overview 5541d91011SPrabhakar Kushwaha------------------------- 5641d91011SPrabhakar Kushwaha 2Gbyte DDR3 (on board DDR), Dual Ranki 5741d91011SPrabhakar Kushwaha 32Mbyte 16bit NOR flash 5841d91011SPrabhakar Kushwaha 128Mbyte 2K page size NAND Flash 5941d91011SPrabhakar Kushwaha 256 Kbit M24256 I2C EEPROM 6041d91011SPrabhakar Kushwaha 128 Mbit SPI Flash memory 6141d91011SPrabhakar Kushwaha SD slot 6241d91011SPrabhakar Kushwaha USB-ULPI 6341d91011SPrabhakar Kushwaha eTSEC1: Connected to SGMII PHY 6441d91011SPrabhakar Kushwaha eTSEC2: Connected to SGMII PHY 6541d91011SPrabhakar Kushwaha PCIe 6641d91011SPrabhakar Kushwaha CPRI 6741d91011SPrabhakar Kushwaha SerDes 6841d91011SPrabhakar Kushwaha I2C RTC 6941d91011SPrabhakar Kushwaha DUART interface: supports one UARTs up to 115200 bps for console display 7041d91011SPrabhakar Kushwaha 7141d91011SPrabhakar KushwahaFrequency Combinations Supported 7241d91011SPrabhakar Kushwaha-------------------------------- 7341d91011SPrabhakar KushwahaCore MHz/CCB MHz/DDR(MT/s) 7441d91011SPrabhakar Kushwaha1. CPU0/CPU1/CCB/DDR: 1000MHz/1000MHz/500MHz/800MHz 7541d91011SPrabhakar Kushwaha (SYSCLK = 100MHz, DDRCLK = 100MHz) 7641d91011SPrabhakar Kushwaha2. CPU0/CPU1/CCB/DDR: 1200MHz/1200MHz/600MHz/1330MHz 7741d91011SPrabhakar Kushwaha (SYSCLK = 100MHz, DDRCLK = 133MHz) 7841d91011SPrabhakar Kushwaha 7941d91011SPrabhakar KushwahaBoot Methods Supported 8041d91011SPrabhakar Kushwaha----------------------- 8141d91011SPrabhakar Kushwaha1. NOR Flash 8241d91011SPrabhakar Kushwaha2. NAND Flash 8341d91011SPrabhakar Kushwaha3. SD Card 8441d91011SPrabhakar Kushwaha4. SPI flash 8541d91011SPrabhakar Kushwaha 8641d91011SPrabhakar KushwahaDefault Boot Method 8741d91011SPrabhakar Kushwaha-------------------- 8841d91011SPrabhakar KushwahaNOR boot 8941d91011SPrabhakar Kushwaha 90*a187559eSBin MengBuilding U-Boot 9141d91011SPrabhakar Kushwaha-------------- 92*a187559eSBin MengTo build the U-Boot for BSC9132QDS: 9341d91011SPrabhakar Kushwaha1. NOR Flash 9441d91011SPrabhakar Kushwaha make BSC9132QDS_NOR_DDRCLK100 : For 100MHZ DDR CLK 9541d91011SPrabhakar Kushwaha make BSC9132QDS_NOR_DDRCLK133 : For 133MHZ DDR CLK 9641d91011SPrabhakar Kushwaha2. NAND Flash : It is currently not supported 9741d91011SPrabhakar Kushwaha3. SPI Flash 9841d91011SPrabhakar Kushwaha make BSC9132QDS_SPIFLASH_DDRCLK100 : For 100MHZ DDR CLK 9941d91011SPrabhakar Kushwaha make BSC9132QDS_SPIFLASH_DDRCLK133 : For 133MHZ DDR CLK 10041d91011SPrabhakar Kushwaha4. SD Card 10141d91011SPrabhakar Kushwaha make BSC9132QDS_SDCARD_DDRCLK100 : For 100MHZ DDR CLK 10241d91011SPrabhakar Kushwaha make BSC9132QDS_SDCARD_DDRCLK133 : For 133MHZ DDR CLK 10341d91011SPrabhakar Kushwaha 10441d91011SPrabhakar KushwahaMemory map 10541d91011SPrabhakar Kushwaha----------- 10641d91011SPrabhakar Kushwaha 0x0000_0000 0x7FFF_FFFF DDR 2G cacheable 10741d91011SPrabhakar Kushwaha 0x8000_0000 0x8FFF_FFFF NOR Flash 256M 10841d91011SPrabhakar Kushwaha 0x9000_0000 0x9FFF_FFFF PCIe Memory 256M 10941d91011SPrabhakar Kushwaha 0xA000_0000 0xA7FF_FFFF DSP core1 L2 space 128M 11041d91011SPrabhakar Kushwaha 0xB000_0000 0xB0FF_FFFF DSP core0 M2 space 16M 11141d91011SPrabhakar Kushwaha 0xB100_0000 0xB1FF_FFFF DSP core1 M2 space 16M 11241d91011SPrabhakar Kushwaha 0xC000_0000 0xC000_7FFF M3 Memory 32K 11341d91011SPrabhakar Kushwaha 0xC001_0000 0xC001_FFFF PCI Express I/O 64K 11441d91011SPrabhakar Kushwaha 0xC100_0000 0xC13F_FFFF MAPLE-2F 4M 11541d91011SPrabhakar Kushwaha 0xC1F0_0000 0xC1F7_FFFF PA SRAM Region 0 512K 11641d91011SPrabhakar Kushwaha 0xC1F8_0000 0xC1FB_FFFF PA SRAM Region 1 512K 11741d91011SPrabhakar Kushwaha 0xFED0_0000 0xFED0_3FFF SEC Secured RAM 16K 11841d91011SPrabhakar Kushwaha 0xFEE0_0000 0xFEE0_0FFF DSP Boot ROM 4K 11941d91011SPrabhakar Kushwaha 0xFF60_0000 0xFF6F_FFFF DSP CCSR 1M 12041d91011SPrabhakar Kushwaha 0xFF70_0000 0xFF7F_FFFF PA CCSR 1M 12141d91011SPrabhakar Kushwaha 0xFF80_0000 0xFFFF_FFFF Boot Page & NAND Buffer 8M 12241d91011SPrabhakar Kushwaha 12341d91011SPrabhakar KushwahaFlashing Images 12441d91011SPrabhakar Kushwaha--------------- 125*a187559eSBin MengTo place a new U-Boot image in the NAND flash and then boot 12641d91011SPrabhakar Kushwahawith that new image temporarily, use this: 12741d91011SPrabhakar Kushwaha tftp 1000000 u-boot-nand.bin 12841d91011SPrabhakar Kushwaha nand erase 0 100000 12941d91011SPrabhakar Kushwaha nand write 1000000 0 100000 13041d91011SPrabhakar Kushwaha reset 13141d91011SPrabhakar Kushwaha 13241d91011SPrabhakar KushwahaUsing the Device Tree Source File 13341d91011SPrabhakar Kushwaha--------------------------------- 13441d91011SPrabhakar KushwahaTo create the DTB (Device Tree Binary) image file, 13541d91011SPrabhakar Kushwahause a command similar to this: 13641d91011SPrabhakar Kushwaha 13741d91011SPrabhakar Kushwaha dtc -b 0 -f -I dts -O dtb bsc9132qds.dts > bsc9132qds.dtb 13841d91011SPrabhakar Kushwaha 13941d91011SPrabhakar KushwahaLikely, that .dts file will come from here; 14041d91011SPrabhakar Kushwaha 14141d91011SPrabhakar Kushwaha linux-2.6/arch/powerpc/boot/dts/bsc9132qds.dts 14241d91011SPrabhakar Kushwaha 14341d91011SPrabhakar KushwahaBooting Linux 14441d91011SPrabhakar Kushwaha------------- 14541d91011SPrabhakar KushwahaPlace a linux uImage in the TFTP disk area. 14641d91011SPrabhakar Kushwaha 14741d91011SPrabhakar Kushwaha tftp 1000000 uImage 14841d91011SPrabhakar Kushwaha tftp 2000000 rootfs.ext2.gz.uboot 14941d91011SPrabhakar Kushwaha tftp c00000 bsc9132qds.dtb 15041d91011SPrabhakar Kushwaha bootm 1000000 2000000 c00000 151