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Searched refs:CONFIG_DDR_CLK_FREQ (Results 1 – 25 of 51) sorted by relevance

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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dfsl_lsch3_speed.c74 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info()
75 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info()
77 sys_info->freq_ddrbus2 = CONFIG_DDR_CLK_FREQ; in get_sys_info()
H A Dfsl_lsch2_speed.c58 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info()
59 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info()
/openbmc/u-boot/include/configs/
H A DBSC9132QDS.h88 #define CONFIG_DDR_CLK_FREQ 100000000 macro
91 #define CONFIG_DDR_CLK_FREQ 133000000 macro
166 #if CONFIG_DDR_CLK_FREQ == 100000000
172 #elif CONFIG_DDR_CLK_FREQ == 133000000
H A Dls2080a_emu.h12 #define CONFIG_DDR_CLK_FREQ 133333333 macro
H A Dls2080a_simu.h12 #define CONFIG_DDR_CLK_FREQ 133333333 macro
H A Dls1021aqds.h34 #define CONFIG_DDR_CLK_FREQ 100000000 macro
38 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() macro
H A Dlx2160a_common.h169 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() macro
H A Dls1088aqds.h46 #define CONFIG_DDR_CLK_FREQ 100000000 macro
51 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() macro
H A Dls1021aiot.h22 #define CONFIG_DDR_CLK_FREQ 100000000 macro
H A Dcontrolcenterd.h51 #define CONFIG_DDR_CLK_FREQ 66666600 macro
H A Dls1046ardb.h12 #define CONFIG_DDR_CLK_FREQ 100000000 macro
H A DP1023RDB.h35 #define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ macro
H A DBSC9131RDB.h48 #define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on 9131 RDB */ macro
H A Dp1_twr.h51 #define CONFIG_DDR_CLK_FREQ 66666666 macro
H A Dxpedite537x.h56 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ macro
H A Dxpedite550x.h55 #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ macro
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dclock.c43 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info()
44 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info()
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c21 #if CONFIG_DDR_CLK_FREQ == 100000000 in sdram_init()
41 #elif CONFIG_DDR_CLK_FREQ == 133000000 in sdram_init()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dspeed.c106 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info()
107 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; in get_sys_info()
583 #ifdef CONFIG_DDR_CLK_FREQ in get_sys_info()
588 sys_info->freq_ddrbus = ddr_ratio * CONFIG_DDR_CLK_FREQ; in get_sys_info()
H A Dcpu.c47 #if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET) in checkcpu()
65 #ifdef CONFIG_DDR_CLK_FREQ in checkcpu()
/openbmc/u-boot/board/freescale/t4rdb/
H A Dspl.c37 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()
/openbmc/u-boot/board/freescale/t208xrdb/
H A Dt208xrdb.c98 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()
H A Dspl.c31 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()
/openbmc/u-boot/board/freescale/t104xrdb/
H A Dspl.c32 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()
/openbmc/u-boot/board/freescale/t102xrdb/
H A Dspl.c32 return CONFIG_DDR_CLK_FREQ; in get_board_ddr_clk()

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