1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2bfe18815SJohn Schmoller /* 3bfe18815SJohn Schmoller * Copyright 2010 Extreme Engineering Solutions, Inc. 4bfe18815SJohn Schmoller * Copyright 2007-2008 Freescale Semiconductor, Inc. 5bfe18815SJohn Schmoller */ 6bfe18815SJohn Schmoller 7bfe18815SJohn Schmoller /* 8bfe18815SJohn Schmoller * xpedite550x board configuration file 9bfe18815SJohn Schmoller */ 10bfe18815SJohn Schmoller #ifndef __CONFIG_H 11bfe18815SJohn Schmoller #define __CONFIG_H 12bfe18815SJohn Schmoller 13bfe18815SJohn Schmoller /* 14bfe18815SJohn Schmoller * High Level Configuration Options 15bfe18815SJohn Schmoller */ 16bfe18815SJohn Schmoller #define CONFIG_SYS_BOARD_NAME "XPedite5500" 17bfe18815SJohn Schmoller #define CONFIG_SYS_FORM_PMC_XMC 1 18bfe18815SJohn Schmoller #define CONFIG_PRPMC_PCI_ALIAS "pci0" /* Processor PMC interface on pci0 */ 19bfe18815SJohn Schmoller 20bfe18815SJohn Schmoller #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ 21b38eaec5SRobert P. J. Day #define CONFIG_PCIE1 1 /* PCIE controller 1 (PEX8112 or XMC) */ 22bfe18815SJohn Schmoller #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ 23842033e6SGabor Juhos #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ 24bfe18815SJohn Schmoller #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ 25bfe18815SJohn Schmoller #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ 26bfe18815SJohn Schmoller 27bfe18815SJohn Schmoller /* 28bfe18815SJohn Schmoller * Multicore config 29bfe18815SJohn Schmoller */ 30bfe18815SJohn Schmoller #define CONFIG_BPTR_VIRT_ADDR 0xee000000 /* virt boot page address */ 31bfe18815SJohn Schmoller #define CONFIG_MPC8xxx_DISABLE_BPTR /* Don't leave BPTR enabled */ 32bfe18815SJohn Schmoller 33bfe18815SJohn Schmoller /* 34bfe18815SJohn Schmoller * DDR config 35bfe18815SJohn Schmoller */ 36bfe18815SJohn Schmoller #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ 37bfe18815SJohn Schmoller #define CONFIG_DDR_SPD 38bfe18815SJohn Schmoller #define CONFIG_MEM_INIT_VALUE 0xdeadbeef 39c39f44dcSKumar Gala #define SPD_EEPROM_ADDRESS 0x54 40bfe18815SJohn Schmoller #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ 41bfe18815SJohn Schmoller #define CONFIG_DIMM_SLOTS_PER_CTLR 1 42bfe18815SJohn Schmoller #define CONFIG_CHIP_SELECTS_PER_CTRL 2 43bfe18815SJohn Schmoller #define CONFIG_DDR_ECC 44bfe18815SJohn Schmoller #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER 45bfe18815SJohn Schmoller #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ 46bfe18815SJohn Schmoller #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 47bfe18815SJohn Schmoller #define CONFIG_VERY_BIG_RAM 48bfe18815SJohn Schmoller 49bfe18815SJohn Schmoller #ifndef __ASSEMBLY__ 50bfe18815SJohn Schmoller extern unsigned long get_board_sys_clk(unsigned long dummy); 51bfe18815SJohn Schmoller extern unsigned long get_board_ddr_clk(unsigned long dummy); 52bfe18815SJohn Schmoller #endif 53bfe18815SJohn Schmoller 54bfe18815SJohn Schmoller #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */ 55bfe18815SJohn Schmoller #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ 56bfe18815SJohn Schmoller 57bfe18815SJohn Schmoller /* 58bfe18815SJohn Schmoller * These can be toggled for performance analysis, otherwise use default. 59bfe18815SJohn Schmoller */ 60bfe18815SJohn Schmoller #define CONFIG_L2_CACHE /* toggle L2 cache */ 61bfe18815SJohn Schmoller #define CONFIG_BTB /* toggle branch predition */ 62bfe18815SJohn Schmoller #define CONFIG_ENABLE_36BIT_PHYS 1 63bfe18815SJohn Schmoller 64e46fedfeSTimur Tabi #define CONFIG_SYS_CCSRBAR 0xef000000 65e46fedfeSTimur Tabi #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 66bfe18815SJohn Schmoller 67bfe18815SJohn Schmoller /* 68bfe18815SJohn Schmoller * Diagnostics 69bfe18815SJohn Schmoller */ 70bfe18815SJohn Schmoller #define CONFIG_SYS_MEMTEST_START 0x10000000 71bfe18815SJohn Schmoller #define CONFIG_SYS_MEMTEST_END 0x20000000 72bfe18815SJohn Schmoller #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ 73bfe18815SJohn Schmoller CONFIG_SYS_POST_I2C) 74bfe18815SJohn Schmoller #define I2C_ADDR_LIST {CONFIG_SYS_I2C_EEPROM_ADDR, \ 75bfe18815SJohn Schmoller CONFIG_SYS_I2C_LM75_ADDR, \ 76bfe18815SJohn Schmoller CONFIG_SYS_I2C_LM90_ADDR, \ 77bfe18815SJohn Schmoller CONFIG_SYS_I2C_PCA953X_ADDR0, \ 78bfe18815SJohn Schmoller CONFIG_SYS_I2C_PCA953X_ADDR2, \ 79bfe18815SJohn Schmoller CONFIG_SYS_I2C_PCA953X_ADDR3, \ 80bfe18815SJohn Schmoller CONFIG_SYS_I2C_RTC_ADDR} 81bfe18815SJohn Schmoller 82bfe18815SJohn Schmoller /* 83bfe18815SJohn Schmoller * Memory map 84bfe18815SJohn Schmoller * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable 85bfe18815SJohn Schmoller * 0x8000_0000 0xbfff_ffff PCIe1 Mem 1G non-cacheable 86bfe18815SJohn Schmoller * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable 87bfe18815SJohn Schmoller * 0xe800_0000 0xe87f_ffff PCIe1 IO 8M non-cacheable 88bfe18815SJohn Schmoller * 0xee00_0000 0xee00_ffff Boot page translation 4K non-cacheable 89bfe18815SJohn Schmoller * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable 90bfe18815SJohn Schmoller * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable 91bfe18815SJohn Schmoller * 0xf000_0000 0xf7ff_ffff NOR Flash 2 128M non-cacheable 92bfe18815SJohn Schmoller * 0xf800_0000 0xffff_ffff NOR Flash 1 128M non-cacheable 93bfe18815SJohn Schmoller */ 94bfe18815SJohn Schmoller 95bfe18815SJohn Schmoller #define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_8 | LCRR_EADC_3) 96bfe18815SJohn Schmoller 97bfe18815SJohn Schmoller /* 98bfe18815SJohn Schmoller * NAND flash configuration 99bfe18815SJohn Schmoller */ 100bfe18815SJohn Schmoller #define CONFIG_SYS_NAND_BASE 0xef800000 101bfe18815SJohn Schmoller #define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ 102bfe18815SJohn Schmoller #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ 103bfe18815SJohn Schmoller CONFIG_SYS_NAND_BASE2} 104bfe18815SJohn Schmoller #define CONFIG_SYS_MAX_NAND_DEVICE 2 105bfe18815SJohn Schmoller #define CONFIG_NAND_FSL_ELBC 106bfe18815SJohn Schmoller 107bfe18815SJohn Schmoller /* 108bfe18815SJohn Schmoller * NOR flash configuration 109bfe18815SJohn Schmoller */ 110bfe18815SJohn Schmoller #define CONFIG_SYS_FLASH_BASE 0xf8000000 111bfe18815SJohn Schmoller #define CONFIG_SYS_FLASH_BASE2 0xf0000000 112bfe18815SJohn Schmoller #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2} 113bfe18815SJohn Schmoller #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ 114bfe18815SJohn Schmoller #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ 115bfe18815SJohn Schmoller #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ 116bfe18815SJohn Schmoller #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ 117bfe18815SJohn Schmoller #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ 118bfe18815SJohn Schmoller {0xf7f40000, 0xc0000} } 119bfe18815SJohn Schmoller #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ 120bfe18815SJohn Schmoller 121bfe18815SJohn Schmoller /* 122bfe18815SJohn Schmoller * Chip select configuration 123bfe18815SJohn Schmoller */ 124bfe18815SJohn Schmoller /* NOR Flash 0 on CS0 */ 125bfe18815SJohn Schmoller #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ 126bfe18815SJohn Schmoller BR_PS_16 | \ 127bfe18815SJohn Schmoller BR_V) 128bfe18815SJohn Schmoller #define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB | \ 129bfe18815SJohn Schmoller OR_GPCM_CSNT | \ 130bfe18815SJohn Schmoller OR_GPCM_XACS | \ 131bfe18815SJohn Schmoller OR_GPCM_ACS_DIV2 | \ 132bfe18815SJohn Schmoller OR_GPCM_SCY_8 | \ 133bfe18815SJohn Schmoller OR_GPCM_TRLX | \ 134bfe18815SJohn Schmoller OR_GPCM_EHTR | \ 135bfe18815SJohn Schmoller OR_GPCM_EAD) 136bfe18815SJohn Schmoller 137bfe18815SJohn Schmoller /* NOR Flash 1 on CS1 */ 138bfe18815SJohn Schmoller #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ 139bfe18815SJohn Schmoller BR_PS_16 | \ 140bfe18815SJohn Schmoller BR_V) 141bfe18815SJohn Schmoller #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM 142bfe18815SJohn Schmoller 143bfe18815SJohn Schmoller /* NAND flash on CS2 */ 144bfe18815SJohn Schmoller #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ 145bfe18815SJohn Schmoller (2<<BR_DECC_SHIFT) | \ 146bfe18815SJohn Schmoller BR_PS_8 | \ 147bfe18815SJohn Schmoller BR_MS_FCM | \ 148bfe18815SJohn Schmoller BR_V) 149bfe18815SJohn Schmoller 150bfe18815SJohn Schmoller /* NAND flash on CS2 */ 151bfe18815SJohn Schmoller #define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB | \ 152bfe18815SJohn Schmoller OR_FCM_PGS | \ 153bfe18815SJohn Schmoller OR_FCM_CSCT | \ 154bfe18815SJohn Schmoller OR_FCM_CST | \ 155bfe18815SJohn Schmoller OR_FCM_CHT | \ 156bfe18815SJohn Schmoller OR_FCM_SCY_1 | \ 157bfe18815SJohn Schmoller OR_FCM_TRLX | \ 158bfe18815SJohn Schmoller OR_FCM_EHTR) 159bfe18815SJohn Schmoller 160bfe18815SJohn Schmoller /* NAND flash on CS3 */ 161bfe18815SJohn Schmoller #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 | \ 162bfe18815SJohn Schmoller (2<<BR_DECC_SHIFT) | \ 163bfe18815SJohn Schmoller BR_PS_8 | \ 164bfe18815SJohn Schmoller BR_MS_FCM | \ 165bfe18815SJohn Schmoller BR_V) 166bfe18815SJohn Schmoller #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM 167bfe18815SJohn Schmoller 168bfe18815SJohn Schmoller /* 169bfe18815SJohn Schmoller * Use L1 as initial stack 170bfe18815SJohn Schmoller */ 171bfe18815SJohn Schmoller #define CONFIG_SYS_INIT_RAM_LOCK 1 172bfe18815SJohn Schmoller #define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000 173553f0982SWolfgang Denk #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 174bfe18815SJohn Schmoller 17525ddd1fbSWolfgang Denk #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 176bfe18815SJohn Schmoller #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 177bfe18815SJohn Schmoller 178bfe18815SJohn Schmoller #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ 179bfe18815SJohn Schmoller #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ 180bfe18815SJohn Schmoller 181bfe18815SJohn Schmoller /* 182bfe18815SJohn Schmoller * Serial Port 183bfe18815SJohn Schmoller */ 184bfe18815SJohn Schmoller #define CONFIG_SYS_NS16550_SERIAL 185bfe18815SJohn Schmoller #define CONFIG_SYS_NS16550_REG_SIZE 1 186bfe18815SJohn Schmoller #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) 187bfe18815SJohn Schmoller #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) 188bfe18815SJohn Schmoller #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) 189bfe18815SJohn Schmoller #define CONFIG_SYS_BAUDRATE_TABLE \ 190bfe18815SJohn Schmoller {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} 191bfe18815SJohn Schmoller #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 192bfe18815SJohn Schmoller #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 193bfe18815SJohn Schmoller 194bfe18815SJohn Schmoller 195bfe18815SJohn Schmoller /* 196bfe18815SJohn Schmoller * I2C 197bfe18815SJohn Schmoller */ 19800f792e0SHeiko Schocher #define CONFIG_SYS_I2C 19900f792e0SHeiko Schocher #define CONFIG_SYS_I2C_FSL 20000f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C_SPEED 400000 20100f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 20200f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 20300f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C2_SPEED 400000 20400f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F 20500f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 206bfe18815SJohn Schmoller 207bfe18815SJohn Schmoller /* I2C DS7505 temperature sensor */ 208bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_LM75_ADDR 0x48 209bfe18815SJohn Schmoller 210bfe18815SJohn Schmoller /* I2C ADT7461 temperature sensor */ 211bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_LM90_ADDR 0x4C 212bfe18815SJohn Schmoller 213bfe18815SJohn Schmoller /* I2C EEPROM - AT24C128B */ 214bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 215bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 216bfe18815SJohn Schmoller #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ 217bfe18815SJohn Schmoller #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ 218bfe18815SJohn Schmoller 219bfe18815SJohn Schmoller /* I2C RTC */ 220bfe18815SJohn Schmoller #define CONFIG_RTC_M41T11 1 221bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_RTC_ADDR 0x68 222bfe18815SJohn Schmoller #define CONFIG_SYS_M41T11_BASE_YEAR 2000 223bfe18815SJohn Schmoller 224bfe18815SJohn Schmoller /* GPIO */ 225bfe18815SJohn Schmoller #define CONFIG_PCA953X 226bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 227bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_PCA953X_ADDR1 0x1c 228bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e 229bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f 230bfe18815SJohn Schmoller #define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 231bfe18815SJohn Schmoller 232bfe18815SJohn Schmoller /* 233bfe18815SJohn Schmoller * GPIO pin definitions, PU = pulled high, PD = pulled low 234bfe18815SJohn Schmoller */ 235bfe18815SJohn Schmoller /* PCA9557 @ 0x18*/ 236bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01 /* PU; UART0 enable (1: enabled) */ 237bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02 /* PU; UART0 serial mode select (1: RS-485, 0: RS-232) */ 238bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04 /* PU; UART1 enable (1: enabled) */ 239bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08 /* PU; UART1 serial mode select (1: RS-485, 0: RS-232) */ 240bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10 /* PU; Boot flash CS select */ 241bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_NVM_WP 0x20 /* PU; Write protection (0: disabled, 1: enabled) */ 242bfe18815SJohn Schmoller 243bfe18815SJohn Schmoller /* PCA9557 @ 0x1e*/ 244bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_XMC_GA0 0x01 /* PU; */ 245bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_XMC_GA1 0x02 /* PU; */ 246bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_XMC_GA2 0x04 /* PU; */ 247bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_XMC_WAKE 0x10 /* PU; */ 248bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_XMC_BIST 0x20 /* Enable XMC BIST */ 249bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_PMC_EREADY 0x40 /* PU; PMC PCI eready */ 250bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_PMC_MONARCH 0x80 /* PMC monarch mode enable */ 251bfe18815SJohn Schmoller 252bfe18815SJohn Schmoller /* PCA9557 @ 0x1f */ 253bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO0 0x01 /* PU; */ 254bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO1 0x02 /* PU; */ 255bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO2 0x04 /* PU; */ 256bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO3 0x08 /* PU; */ 257bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO4 0x10 /* PU; */ 258bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO5 0x20 /* PU; */ 259bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO6 0x40 /* PU; */ 260bfe18815SJohn Schmoller #define CONFIG_SYS_PCA953X_MC_GPIO7 0x80 /* PU; */ 261bfe18815SJohn Schmoller 262bfe18815SJohn Schmoller /* 263bfe18815SJohn Schmoller * General PCI 264bfe18815SJohn Schmoller * Memory space is mapped 1-1, but I/O space must start from 0. 265bfe18815SJohn Schmoller */ 266bfe18815SJohn Schmoller 267bfe18815SJohn Schmoller /* controller 1 - PEX8112 or XMC, depending on build option */ 268bfe18815SJohn Schmoller #define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 269bfe18815SJohn Schmoller #define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS 270bfe18815SJohn Schmoller #define CONFIG_SYS_PCIE1_MEM_SIZE 0x40000000 /* 1G */ 271bfe18815SJohn Schmoller #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 272bfe18815SJohn Schmoller #define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000 273bfe18815SJohn Schmoller #define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */ 274bfe18815SJohn Schmoller 275bfe18815SJohn Schmoller /* 276bfe18815SJohn Schmoller * Networking options 277bfe18815SJohn Schmoller */ 278bfe18815SJohn Schmoller #define CONFIG_TSEC_TBI 279bfe18815SJohn Schmoller #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ 280bfe18815SJohn Schmoller #define CONFIG_ETHPRIME "eTSEC2" 281bfe18815SJohn Schmoller 28272c96a68SKumar Gala /* 28372c96a68SKumar Gala * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force 28472c96a68SKumar Gala * 1000mbps SGMII link 28572c96a68SKumar Gala */ 28672c96a68SKumar Gala #define CONFIG_TSEC_TBICR_SETTINGS ( \ 28772c96a68SKumar Gala TBICR_PHY_RESET \ 28872c96a68SKumar Gala | TBICR_FULL_DUPLEX \ 28972c96a68SKumar Gala | TBICR_SPEED1_SET \ 29072c96a68SKumar Gala ) 29172c96a68SKumar Gala 292bfe18815SJohn Schmoller #define CONFIG_TSEC1 1 293bfe18815SJohn Schmoller #define CONFIG_TSEC1_NAME "eTSEC1" 294bfe18815SJohn Schmoller #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 295bfe18815SJohn Schmoller #define TSEC1_PHY_ADDR 1 296bfe18815SJohn Schmoller #define TSEC1_PHYIDX 0 297bfe18815SJohn Schmoller #define CONFIG_HAS_ETH0 298bfe18815SJohn Schmoller 299bfe18815SJohn Schmoller #define CONFIG_TSEC2 1 300bfe18815SJohn Schmoller #define CONFIG_TSEC2_NAME "eTSEC2" 301bfe18815SJohn Schmoller #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 302bfe18815SJohn Schmoller #define TSEC2_PHY_ADDR 2 303bfe18815SJohn Schmoller #define TSEC2_PHYIDX 0 304bfe18815SJohn Schmoller #define CONFIG_HAS_ETH1 305bfe18815SJohn Schmoller 306bfe18815SJohn Schmoller #define CONFIG_TSEC3 1 307bfe18815SJohn Schmoller #define CONFIG_TSEC3_NAME "eTSEC3" 308bfe18815SJohn Schmoller #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) 309bfe18815SJohn Schmoller #define TSEC3_PHY_ADDR 3 310bfe18815SJohn Schmoller #define TSEC3_PHYIDX 0 311bfe18815SJohn Schmoller #define CONFIG_HAS_ETH2 312bfe18815SJohn Schmoller 313bfe18815SJohn Schmoller /* 314bfe18815SJohn Schmoller * USB 315bfe18815SJohn Schmoller */ 316bfe18815SJohn Schmoller #define CONFIG_USB_EHCI_FSL 317bfe18815SJohn Schmoller #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 318bfe18815SJohn Schmoller 319bfe18815SJohn Schmoller /* 320bfe18815SJohn Schmoller * Miscellaneous configurable options 321bfe18815SJohn Schmoller */ 322bfe18815SJohn Schmoller #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 323bfe18815SJohn Schmoller #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ 324bfe18815SJohn Schmoller #define CONFIG_PREBOOT /* enable preboot variable */ 325bfe18815SJohn Schmoller #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ 326bfe18815SJohn Schmoller 327bfe18815SJohn Schmoller /* 328bfe18815SJohn Schmoller * For booting Linux, the board info and command line data 329bfe18815SJohn Schmoller * have to be in the first 16 MB of memory, since this is 330bfe18815SJohn Schmoller * the maximum mapped by the Linux kernel during initialization. 331bfe18815SJohn Schmoller */ 332bfe18815SJohn Schmoller #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ 333bfe18815SJohn Schmoller #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ 334bfe18815SJohn Schmoller 335bfe18815SJohn Schmoller /* 336bfe18815SJohn Schmoller * Environment Configuration 337bfe18815SJohn Schmoller */ 338bfe18815SJohn Schmoller #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ 339bfe18815SJohn Schmoller #define CONFIG_ENV_SIZE 0x8000 340bfe18815SJohn Schmoller #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) 341bfe18815SJohn Schmoller 342bfe18815SJohn Schmoller /* 343bfe18815SJohn Schmoller * Flash memory map: 344bfe18815SJohn Schmoller * fff80000 - ffffffff Pri U-Boot (512 KB) 345bfe18815SJohn Schmoller * fff40000 - fff7ffff Pri U-Boot Environment (256 KB) 346bfe18815SJohn Schmoller * fff00000 - fff3ffff Pri FDT (256KB) 347bfe18815SJohn Schmoller * fef00000 - ffefffff Pri OS image (16MB) 348bfe18815SJohn Schmoller * f8000000 - feefffff Pri OS Use/Filesystem (111MB) 349bfe18815SJohn Schmoller * 350bfe18815SJohn Schmoller * f7f80000 - f7ffffff Sec U-Boot (512 KB) 351bfe18815SJohn Schmoller * f7f40000 - f7f7ffff Sec U-Boot Environment (256 KB) 352bfe18815SJohn Schmoller * f7f00000 - f7f3ffff Sec FDT (256KB) 353bfe18815SJohn Schmoller * f6f00000 - f7efffff Sec OS image (16MB) 354bfe18815SJohn Schmoller * f0000000 - f6efffff Sec OS Use/Filesystem (111MB) 355bfe18815SJohn Schmoller */ 3565368c55dSMarek Vasut #define CONFIG_UBOOT1_ENV_ADDR __stringify(0xfff80000) 3575368c55dSMarek Vasut #define CONFIG_UBOOT2_ENV_ADDR __stringify(0xf7f80000) 3585368c55dSMarek Vasut #define CONFIG_FDT1_ENV_ADDR __stringify(0xfff00000) 3595368c55dSMarek Vasut #define CONFIG_FDT2_ENV_ADDR __stringify(0xf7f00000) 3605368c55dSMarek Vasut #define CONFIG_OS1_ENV_ADDR __stringify(0xfef00000) 3615368c55dSMarek Vasut #define CONFIG_OS2_ENV_ADDR __stringify(0xf6f00000) 362bfe18815SJohn Schmoller 363bfe18815SJohn Schmoller #define CONFIG_PROG_UBOOT1 \ 364bfe18815SJohn Schmoller "$download_cmd $loadaddr $ubootfile; " \ 365bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 366bfe18815SJohn Schmoller "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ 367bfe18815SJohn Schmoller "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ 368bfe18815SJohn Schmoller "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \ 369bfe18815SJohn Schmoller "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ 370bfe18815SJohn Schmoller "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \ 371bfe18815SJohn Schmoller "if test $? -ne 0; then " \ 372bfe18815SJohn Schmoller "echo PROGRAM FAILED; " \ 373bfe18815SJohn Schmoller "else; " \ 374bfe18815SJohn Schmoller "echo PROGRAM SUCCEEDED; " \ 375bfe18815SJohn Schmoller "fi; " \ 376bfe18815SJohn Schmoller "else; " \ 377bfe18815SJohn Schmoller "echo DOWNLOAD FAILED; " \ 378bfe18815SJohn Schmoller "fi;" 379bfe18815SJohn Schmoller 380bfe18815SJohn Schmoller #define CONFIG_PROG_UBOOT2 \ 381bfe18815SJohn Schmoller "$download_cmd $loadaddr $ubootfile; " \ 382bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 383bfe18815SJohn Schmoller "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ 384bfe18815SJohn Schmoller "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ 385bfe18815SJohn Schmoller "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \ 386bfe18815SJohn Schmoller "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ 387bfe18815SJohn Schmoller "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \ 388bfe18815SJohn Schmoller "if test $? -ne 0; then " \ 389bfe18815SJohn Schmoller "echo PROGRAM FAILED; " \ 390bfe18815SJohn Schmoller "else; " \ 391bfe18815SJohn Schmoller "echo PROGRAM SUCCEEDED; " \ 392bfe18815SJohn Schmoller "fi; " \ 393bfe18815SJohn Schmoller "else; " \ 394bfe18815SJohn Schmoller "echo DOWNLOAD FAILED; " \ 395bfe18815SJohn Schmoller "fi;" 396bfe18815SJohn Schmoller 397bfe18815SJohn Schmoller #define CONFIG_BOOT_OS_NET \ 398bfe18815SJohn Schmoller "$download_cmd $osaddr $osfile; " \ 399bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 400bfe18815SJohn Schmoller "if test -n $fdtaddr; then " \ 401bfe18815SJohn Schmoller "$download_cmd $fdtaddr $fdtfile; " \ 402bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 403bfe18815SJohn Schmoller "bootm $osaddr - $fdtaddr; " \ 404bfe18815SJohn Schmoller "else; " \ 405bfe18815SJohn Schmoller "echo FDT DOWNLOAD FAILED; " \ 406bfe18815SJohn Schmoller "fi; " \ 407bfe18815SJohn Schmoller "else; " \ 408bfe18815SJohn Schmoller "bootm $osaddr; " \ 409bfe18815SJohn Schmoller "fi; " \ 410bfe18815SJohn Schmoller "else; " \ 411bfe18815SJohn Schmoller "echo OS DOWNLOAD FAILED; " \ 412bfe18815SJohn Schmoller "fi;" 413bfe18815SJohn Schmoller 414bfe18815SJohn Schmoller #define CONFIG_PROG_OS1 \ 415bfe18815SJohn Schmoller "$download_cmd $osaddr $osfile; " \ 416bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 417bfe18815SJohn Schmoller "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \ 418bfe18815SJohn Schmoller "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ 419bfe18815SJohn Schmoller "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ 420bfe18815SJohn Schmoller "if test $? -ne 0; then " \ 421bfe18815SJohn Schmoller "echo OS PROGRAM FAILED; " \ 422bfe18815SJohn Schmoller "else; " \ 423bfe18815SJohn Schmoller "echo OS PROGRAM SUCCEEDED; " \ 424bfe18815SJohn Schmoller "fi; " \ 425bfe18815SJohn Schmoller "else; " \ 426bfe18815SJohn Schmoller "echo OS DOWNLOAD FAILED; " \ 427bfe18815SJohn Schmoller "fi;" 428bfe18815SJohn Schmoller 429bfe18815SJohn Schmoller #define CONFIG_PROG_OS2 \ 430bfe18815SJohn Schmoller "$download_cmd $osaddr $osfile; " \ 431bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 432bfe18815SJohn Schmoller "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \ 433bfe18815SJohn Schmoller "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ 434bfe18815SJohn Schmoller "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ 435bfe18815SJohn Schmoller "if test $? -ne 0; then " \ 436bfe18815SJohn Schmoller "echo OS PROGRAM FAILED; " \ 437bfe18815SJohn Schmoller "else; " \ 438bfe18815SJohn Schmoller "echo OS PROGRAM SUCCEEDED; " \ 439bfe18815SJohn Schmoller "fi; " \ 440bfe18815SJohn Schmoller "else; " \ 441bfe18815SJohn Schmoller "echo OS DOWNLOAD FAILED; " \ 442bfe18815SJohn Schmoller "fi;" 443bfe18815SJohn Schmoller 444bfe18815SJohn Schmoller #define CONFIG_PROG_FDT1 \ 445bfe18815SJohn Schmoller "$download_cmd $fdtaddr $fdtfile; " \ 446bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 447bfe18815SJohn Schmoller "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \ 448bfe18815SJohn Schmoller "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ 449bfe18815SJohn Schmoller "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ 450bfe18815SJohn Schmoller "if test $? -ne 0; then " \ 451bfe18815SJohn Schmoller "echo FDT PROGRAM FAILED; " \ 452bfe18815SJohn Schmoller "else; " \ 453bfe18815SJohn Schmoller "echo FDT PROGRAM SUCCEEDED; " \ 454bfe18815SJohn Schmoller "fi; " \ 455bfe18815SJohn Schmoller "else; " \ 456bfe18815SJohn Schmoller "echo FDT DOWNLOAD FAILED; " \ 457bfe18815SJohn Schmoller "fi;" 458bfe18815SJohn Schmoller 459bfe18815SJohn Schmoller #define CONFIG_PROG_FDT2 \ 460bfe18815SJohn Schmoller "$download_cmd $fdtaddr $fdtfile; " \ 461bfe18815SJohn Schmoller "if test $? -eq 0; then " \ 462bfe18815SJohn Schmoller "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \ 463bfe18815SJohn Schmoller "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ 464bfe18815SJohn Schmoller "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ 465bfe18815SJohn Schmoller "if test $? -ne 0; then " \ 466bfe18815SJohn Schmoller "echo FDT PROGRAM FAILED; " \ 467bfe18815SJohn Schmoller "else; " \ 468bfe18815SJohn Schmoller "echo FDT PROGRAM SUCCEEDED; " \ 469bfe18815SJohn Schmoller "fi; " \ 470bfe18815SJohn Schmoller "else; " \ 471bfe18815SJohn Schmoller "echo FDT DOWNLOAD FAILED; " \ 472bfe18815SJohn Schmoller "fi;" 473bfe18815SJohn Schmoller 474bfe18815SJohn Schmoller #define CONFIG_EXTRA_ENV_SETTINGS \ 475bfe18815SJohn Schmoller "autoload=yes\0" \ 476bfe18815SJohn Schmoller "download_cmd=tftp\0" \ 477bfe18815SJohn Schmoller "console_args=console=ttyS0,115200\0" \ 478bfe18815SJohn Schmoller "root_args=root=/dev/nfs rw\0" \ 479bfe18815SJohn Schmoller "misc_args=ip=on\0" \ 480bfe18815SJohn Schmoller "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ 481bfe18815SJohn Schmoller "bootfile=/home/user/file\0" \ 482bfe18815SJohn Schmoller "osfile=/home/user/board.uImage\0" \ 483bfe18815SJohn Schmoller "fdtfile=/home/user/board.dtb\0" \ 484bfe18815SJohn Schmoller "ubootfile=/home/user/u-boot.bin\0" \ 485b24a4f62SScott Wood "fdtaddr=0x1e00000\0" \ 486bfe18815SJohn Schmoller "osaddr=0x1000000\0" \ 487bfe18815SJohn Schmoller "loadaddr=0x1000000\0" \ 488bfe18815SJohn Schmoller "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ 489bfe18815SJohn Schmoller "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \ 490bfe18815SJohn Schmoller "prog_os1="CONFIG_PROG_OS1"\0" \ 491bfe18815SJohn Schmoller "prog_os2="CONFIG_PROG_OS2"\0" \ 492bfe18815SJohn Schmoller "prog_fdt1="CONFIG_PROG_FDT1"\0" \ 493bfe18815SJohn Schmoller "prog_fdt2="CONFIG_PROG_FDT2"\0" \ 494bfe18815SJohn Schmoller "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ 495bfe18815SJohn Schmoller "bootcmd_flash1=run set_bootargs; " \ 496bfe18815SJohn Schmoller "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\ 497bfe18815SJohn Schmoller "bootcmd_flash2=run set_bootargs; " \ 498bfe18815SJohn Schmoller "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\ 499bfe18815SJohn Schmoller "bootcmd=run bootcmd_flash1\0" 500bfe18815SJohn Schmoller #endif /* __CONFIG_H */ 501