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Searched refs:CLK_TOP_DMPLL (Results 1 – 22 of 22) sorted by relevance

/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c84 FIXED_CLK(CLK_TOP_DMPLL, CLK_XTAL, 400 * MHZ),
147 FACTOR1(CLK_TOP_DMPLL_D2, CLK_TOP_DMPLL, 1, 2),
148 FACTOR1(CLK_TOP_DMPLL_D4, CLK_TOP_DMPLL, 1, 4),
149 FACTOR1(CLK_TOP_DMPLL_X2, CLK_TOP_DMPLL, 1, 1),
199 CLK_TOP_DMPLL
215 CLK_TOP_DMPLL
403 CLK_TOP_DMPLL
444 CLK_TOP_DMPLL,
H A Dclk-mt7629.c97 FACTOR1(CLK_TOP_DMPLL, CLK_TOP_MEMPLL, 1, 1),
159 CLK_TOP_DMPLL
164 CLK_TOP_DMPLL
180 CLK_TOP_DMPLL
/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h31 #define CLK_TOP_DMPLL 21 macro
H A Dmt8516-clk.h35 #define CLK_TOP_DMPLL 3 macro
H A Dmt7622-clk.h29 #define CLK_TOP_DMPLL 17 macro
H A Dmediatek,mt6795-clk.h38 #define CLK_TOP_DMPLL 27 macro
H A Dmt6765-clk.h86 #define CLK_TOP_DMPLL 51 macro
H A Dmt8173-clk.h37 #define CLK_TOP_DMPLL 27 macro
H A Dmt2712-clk.h121 #define CLK_TOP_DMPLL 90 macro
H A Dmt2701-clk.h53 #define CLK_TOP_DMPLL 43 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h34 #define CLK_TOP_DMPLL 21 macro
H A Dmt7623-clk.h13 #define CLK_TOP_DMPLL 1 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c389 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "clkph_mck_o", 1, 1),
H A Dclk-mt8173-topckgen.c464 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "clkph_mck_o", 1, 1),
H A Dclk-mt7622.c271 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
H A Dclk-mt8516.c30 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
H A Dclk-mt8167.c33 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
H A Dclk-mt7629.c374 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
H A Dclk-mt2712.c25 FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", NULL, 350000000),
H A Dclk-mt6765.c79 FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", NULL, 466000000),
H A Dclk-mt2701.c30 FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", "clk26m",
/openbmc/u-boot/arch/arm/dts/
H A Dmt7629.dtsi125 <&topckgen CLK_TOP_DMPLL>;