Home
last modified time | relevance | path

Searched refs:CLK_TOP_AUD1_SEL (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
H A Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
H A Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h111 #define CLK_TOP_AUD1_SEL 97 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c446 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt8516.c395 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt8167.c584 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt7629.c516 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c401 MUX_GATE(CLK_TOP_AUD1_SEL, aud1_parents, 0xA0, 0, 1, 7),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi622 <&topckgen CLK_TOP_AUD1_SEL>,