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Searched refs:CLK_TOP_APLL1_D4 (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h67 #define CLK_TOP_APLL1_D4 35 macro
H A Dmt6765-clk.h78 #define CLK_TOP_APLL1_D4 43 macro
H A Dmediatek,mt8365-clk.h56 #define CLK_TOP_APLL1_D4 46 macro
H A Dmt2712-clk.h76 #define CLK_TOP_APLL1_D4 45 macro
H A Dmt6779-clk.h85 #define CLK_TOP_APLL1_D4 75 macro
H A Dmt8183-clk.h110 #define CLK_TOP_APLL1_D4 74 macro
H A Dmt8186-clk.h119 #define CLK_TOP_APLL1_D4 100 macro
H A Dmt8192-clk.h115 #define CLK_TOP_APLL1_D4 103 macro
H A Dmediatek,mt8188-clk.h143 #define CLK_TOP_APLL1_D4 132 macro
H A Dmt8195-clk.h176 #define CLK_TOP_APLL1_D4 164 macro
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.h192 CLK_TOP_APLL1_D4, enumerator
H A Dmt8192-afe-clk.c35 [CLK_TOP_APLL1_D4] = "top_apll1_d4",
109 afe_priv->clk[CLK_TOP_APLL1_D4]); in apll1_mux_setting()
113 aud_clks[CLK_TOP_APLL1_D4], ret); in apll1_mux_setting()
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c54 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
H A Dclk-mt8516.c62 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "rg_apll1_d2_en", 1, 2),
H A Dclk-mt8167.c69 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "rg_apll1_d2_en", 1, 2),
H A Dclk-mt8188-topckgen.c67 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
H A Dclk-mt8183.c73 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
H A Dclk-mt2712.c84 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1_ck", 1, 4),
H A Dclk-mt8365.c78 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1_ck", 1, 4),
H A Dclk-mt8192.c61 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
H A Dclk-mt8195-topckgen.c78 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
H A Dclk-mt6779.c71 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
H A Dclk-mt6765.c128 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1_ck", 1, 4),
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt8188-afe.yaml211 <&topckgen 132>, //CLK_TOP_APLL1_D4
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi982 <&topckgen CLK_TOP_APLL1_D4>,