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Searched refs:CLKID_USB1_DDR_BRIDGE (Results 1 – 18 of 18) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Daxg-clkc.h57 #define CLKID_USB1_DDR_BRIDGE 48 macro
H A Dgxbb-clkc.h70 #define CLKID_USB1_DDR_BRIDGE 64 macro
/openbmc/linux/include/dt-bindings/clock/
H A Daxg-clkc.h59 #define CLKID_USB1_DDR_BRIDGE 48 macro
H A Dgxbb-clkc.h72 #define CLKID_USB1_DDR_BRIDGE 64 macro
H A Dmeson8b-clkc.h71 #define CLKID_USB1_DDR_BRIDGE 64 macro
H A Dg12a-clkc.h66 #define CLKID_USB1_DDR_BRIDGE 55 macro
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxbb.dtsi53 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
/openbmc/u-boot/drivers/clk/
H A Dclk_meson.c139 MESON_GATE(CLKID_USB1_DDR_BRIDGE, HHI_GCLK_MPEG2, 8),
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb.dtsi54 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
H A Dmeson-gxl.dtsi25 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
H A Dmeson-axg.dtsi237 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
H A Dmeson-g12-common.dtsi2392 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8.dtsi790 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
H A Dmeson8b.dtsi761 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
/openbmc/linux/drivers/clk/meson/
H A Dmeson8b.c2840 [CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
3044 [CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
3259 [CLKID_USB1_DDR_BRIDGE] = &meson8b_usb1_ddr_bridge.hw,
H A Dgxbb.c2797 [CLKID_USB1_DDR_BRIDGE] = &gxbb_usb1_ddr_bridge.hw,
3005 [CLKID_USB1_DDR_BRIDGE] = &gxbb_usb1_ddr_bridge.hw,
H A Dg12a.c4306 [CLKID_USB1_DDR_BRIDGE] = &g12a_usb1_to_ddr.hw,
4531 [CLKID_USB1_DDR_BRIDGE] = &g12a_usb1_to_ddr.hw,
4791 [CLKID_USB1_DDR_BRIDGE] = &g12a_usb1_to_ddr.hw,
H A Daxg.c1944 [CLKID_USB1_DDR_BRIDGE] = &axg_usb1_to_ddr.hw,