Searched refs:BR_V (Results 1 – 25 of 53) sorted by relevance
123
79 BR_V)100 BR_V)123 BR_V)146 BR_V)
156 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)159 #define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)186 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)295 | BR_V) /* valid */313 | BR_V) /* valid */319 | BR_V) /* valid */326 | BR_V) /* valid */
162 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)167 | BR_PS_16 | BR_V)199 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)293 | BR_V) /* valid */313 | BR_V) /* valid */320 | BR_V) /* valid */328 | BR_V) /* valid */
111 BR_V)119 BR_V)125 BR_V)139 BR_V)
154 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x800000) | BR_PS_16 | BR_V)156 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)206 | BR_PS_32 | (3<<BR_MSEL_SHIFT) | BR_V)283 (BR_PHYS_ADDR(CADMUS_BASE_ADDR_PHYS) | BR_PS_8 | BR_V)
125 BR_V)138 BR_V)146 BR_V)163 BR_V)
127 BR_V)140 BR_V)148 BR_V)165 BR_V)
90 BR_V)95 BR_V)111 BR_V)
37 | BR_V) /* valid */59 | BR_V) /* valid */
123 | BR_V) /* valid */181 | BR_V) /* valid */205 | BR_V)218 | BR_V)
178 BR_V)212 BR_V)237 BR_V)254 BR_V)
195 | BR_V) /* valid */223 | BR_V)249 | BR_V)268 | BR_V)
138 BR_V)151 BR_V)157 BR_V)169 BR_V)
226 | BR_V)248 | BR_V)269 | BR_V)288 | BR_V)
169 | BR_PS_16 | BR_V)174 (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)184 #define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)224 | BR_V) /* valid */
192 | BR_V) /* valid */257 | BR_V) /* valid */293 | BR_V) /* valid */318 | BR_V) /* valid */
229 | BR_V) /* valid */254 | BR_V) /* valid */270 | BR_V) /* valid */
357 | BR_PS_16 | BR_V)394 | BR_V) /* valid */448 BR_PS_8 | BR_V)454 BR_PS_8 | BR_V)486 (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE_PHYS) | BR_PS_8 | BR_V)
225 | BR_V) /* valid */251 | BR_V) /* valid */272 | BR_V) /* valid */
164 BR_V)184 BR_V)
103 BR_V) /* valid */123 BR_V) /* valid */143 | BR_V)
91 | BR_PS_16 | BR_V)123 | BR_V) /* valid */
43 if (get_lbc_br(1) & BR_V) in init_early_memctl_regs()125 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) { in upmconfig()
132 out_be32(&bank->br, reg_new | BR_V); in reg_store()349 if ((reg_br_cur & BR_V)) { in uio_fsl_elbc_gpcm_probe()359 if ((reg_br_cur & ~(BR_BA | BR_V)) != in uio_fsl_elbc_gpcm_probe()360 (reg_br_new & ~(BR_BA | BR_V))) { in uio_fsl_elbc_gpcm_probe()374 reg_br_new |= fsl_lbc_addr(res.start) | BR_MS_GPCM | BR_V; in uio_fsl_elbc_gpcm_probe()
240 if (!(br0 & BR_V) || !(br1 & BR_V)) { in p1022ds_set_monitor_port()251 br0 = (br0 & BR_BA) | BR_V; in p1022ds_set_monitor_port()257 br1 = (br1 & BR_BA) | BR_V; in p1022ds_set_monitor_port()