| /openbmc/linux/drivers/soc/ti/ |
| H A D | k3-ringacc.c | 40 u32 db;
42 u32 occ;
43 u32 indx;
44 u32 hwocc;
45 u32 hwindx;
79 u32 config;
94 u32 status;
130 u32 free;
131 u32 occ;
165 u32 size;
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| /openbmc/linux/drivers/acpi/arm64/ |
| H A D | iort.c | 456 u32 id_in, u32 *id_out, in iort_node_map_id()
526 u32 id; in iort_node_map_platform_id()
584 u32 iort_msi_map_id(struct device *dev, u32 input_id) in iort_msi_map_id()
587 u32 dev_id; in iort_msi_map_id()
813 u32 *sids, u32 num_sids) in iort_rmr_alloc()
856 u32 count) in iort_rmr_desc_check_overlap()
889 u32 *sids, u32 num_sids, in iort_get_rmrs()
931 static u32 *iort_rmr_alloc_sids(u32 *sids, u32 count, u32 id_start, in iort_rmr_alloc_sids()
1259 u32 streamid; in iort_pci_iommu_init()
1307 u32 streamid; in iort_nc_iommu_map_id()
[all …]
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| /openbmc/linux/drivers/scsi/bfa/ |
| H A D | bfa_ioc_cb.c | 18 #define bfa_ioc_cb_join_pos(__ioc) ((u32) (1 << BFA_IOC_CB_JOIN_SH))
129 static struct { u32 hfn, lpu; } iocreg_mbcmd[] = {
218 u32 ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate); in bfa_ioc_cb_sync_start()
257 u32 r32 = readl(ioc->ioc_regs.ioc_fwstate); in bfa_ioc_cb_sync_join()
258 u32 join_pos = bfa_ioc_cb_join_pos(ioc); in bfa_ioc_cb_sync_join()
266 u32 r32 = readl(ioc->ioc_regs.ioc_fwstate); in bfa_ioc_cb_sync_leave()
267 u32 join_pos = bfa_ioc_cb_join_pos(ioc); in bfa_ioc_cb_sync_leave()
276 u32 r32 = readl(ioc->ioc_regs.ioc_fwstate); in bfa_ioc_cb_set_cur_ioc_fwstate()
293 u32 r32 = readl(ioc->ioc_regs.alt_ioc_fwstate); in bfa_ioc_cb_set_alt_ioc_fwstate()
315 u32 fwstate, alt_fwstate; in bfa_ioc_cb_sync_complete()
[all …]
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| /openbmc/linux/drivers/clk/qcom/ |
| H A D | clk-pll.c | 28 u32 mask, val; in clk_pll_enable()
68 u32 mask; in clk_pll_disable()
69 u32 val; in clk_pll_disable()
83 u32 l, m, n, config; in clk_pll_recalc_rate()
146 u32 mode; in clk_pll_set_rate()
147 u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N; in clk_pll_set_rate()
181 u32 val; in wait_for_pll()
221 u32 val; in clk_pll_configure()
222 u32 mask; in clk_pll_configure()
267 u32 mode; in clk_pll_sr2_enable()
[all …]
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| H A D | clk-alpha-pll.c | 294 u32 val; in wait_for_pll()
411 u32 val; in clk_alpha_pll_hwfsm_enable()
436 u32 val; in clk_alpha_pll_hwfsm_disable()
466 u32 val; in pll_is_enabled()
565 alpha_pll_calc_rate(u64 prate, u32 l, u32 a, u32 alpha_width) in alpha_pll_calc_rate()
779 u32 *l, u32 *a) in alpha_huayra_pll_round_rate()
941 u32 val; in clk_trion_pll_enable()
2388 u32 l; in clk_rivian_evo_pll_recalc_rate()
2400 u32 l; in clk_rivian_evo_pll_round_rate()
2479 u32 l; in clk_alpha_pll_stromer_determine_rate()
[all …]
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| /openbmc/linux/include/trace/events/ |
| H A D | mmc.h | 20 __field(u32, cmd_opcode)
21 __field(u32, cmd_arg)
24 __field(u32, stop_opcode)
25 __field(u32, stop_arg)
28 __field(u32, sbc_opcode)
29 __field(u32, sbc_arg)
103 __field(u32, cmd_opcode)
105 __array(u32, cmd_resp, 4)
107 __field(u32, stop_opcode)
111 __field(u32, sbc_opcode)
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| /openbmc/linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | mc5.c | 93 static int mc5_cmd_write(struct adapter *adapter, u32 cmd) in mc5_cmd_write()
100 static inline void dbgi_wr_data3(struct adapter *adapter, u32 v1, u32 v2, in dbgi_wr_data3()
101 u32 v3) in dbgi_wr_data3()
113 static int mc5_write(struct adapter *adapter, u32 addr_lo, u32 cmd) in mc5_write()
123 static int init_mask_data_array(struct mc5 *mc5, u32 mask_array_base, in init_mask_data_array()
124 u32 data_array_base, u32 write_cmd, in init_mask_data_array()
310 u32 cfg; in t3_mc5_init()
370 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE); in t3_mc5_intr_handler()
411 u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG); in t3_mc5_prep()
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| /openbmc/u-boot/drivers/sound/ |
| H A D | hda_codec.c | 30 u32 gctl;
34 u32 cmd; /* 0x60 */
35 u32 resp;
36 u32 icii;
87 u32 reg32 = readl(®s->icii); in hda_wait_for_ready()
100 u32 reg32; in wait_for_response()
125 static int set_bits(void *port, u32 mask, u32 val) in set_bits()
127 u32 reg32; in set_bits()
178 u32 vendor_id, device_id; in find_verb_data()
205 const u32 *verb; in send_verbs()
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| /openbmc/linux/drivers/net/wireless/marvell/mwifiex/ |
| H A D | cfp.c | 184 u32 mwifiex_index_to_acs_data_rate(struct mwifiex_private *priv, in mwifiex_index_to_acs_data_rate()
187 u32 rate = 0; in mwifiex_index_to_acs_data_rate()
238 u32 mwifiex_index_to_data_rate(struct mwifiex_private *priv, in mwifiex_index_to_data_rate()
241 u32 mcs_num_supp = in mwifiex_index_to_data_rate()
243 u32 rate; in mwifiex_index_to_data_rate()
285 u32 mwifiex_get_active_data_rates(struct mwifiex_private *priv, u8 *rates) in mwifiex_get_active_data_rates()
362 u32 i; in mwifiex_is_rate_auto()
378 u32 mwifiex_get_rates_from_cfg80211(struct mwifiex_private *priv, in mwifiex_get_rates_from_cfg80211()
383 u32 num_rates, rate_mask; in mwifiex_get_rates_from_cfg80211()
413 u32 mwifiex_get_supported_rates(struct mwifiex_private *priv, u8 *rates) in mwifiex_get_supported_rates()
[all …]
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| /openbmc/linux/drivers/net/dsa/b53/ |
| H A D | b53_mmap.c | 59 static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val) in b53_mmap_read32()
85 u32 hi; in b53_mmap_read48()
97 u32 lo; in b53_mmap_read48()
118 u32 hi, lo; in b53_mmap_read64()
164 u32 value) in b53_mmap_write32()
187 u32 hi = (u32)(value >> 16); in b53_mmap_write48()
194 u32 lo = (u32)value; in b53_mmap_write48()
206 u32 hi, lo; in b53_mmap_write64()
266 pdata->chip_id = (u32)(unsigned long)device_get_match_data(dev); in b53_mmap_probe_of()
276 u32 reg; in b53_mmap_probe_of()
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| /openbmc/linux/drivers/net/ethernet/freescale/ |
| H A D | fsl_pq_mdio.c | 41 u32 miimcfg; /* MII management configuration reg */
42 u32 miimcom; /* MII management command reg */
43 u32 miimadd; /* MII management address reg */
44 u32 miimcon; /* MII management control reg */
45 u32 miimstat; /* MII management status reg */
46 u32 miimind; /* MII management indication reg */
51 u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
52 u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
54 u32 emapm; /* MDIO Event mapping register (for etsec2)*/
58 u32 utbipar; /* TBI phy address reg (only on UCC) */
[all …]
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| /openbmc/linux/drivers/net/ethernet/chelsio/cxgb/ |
| H A D | espi.c | 37 u32 misc_ctrl;
52 int ch_addr, int reg_offset, u32 wr_data) in tricn_write()
110 u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable()
133 u32 pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_disable()
141 u32 status = readl(espi->adapter->regs + A_ESPI_INTR_STATUS); in t1_espi_intr_handler()
180 u32 wmark = t1_is_T1B(adapter) ? 0x4000 : 0x3200; in espi_setup_for_pm3393()
230 u32 status_enable_extra = 0; in t1_espi_init()
291 void t1_espi_set_misc_ctrl(adapter_t *adapter, u32 val)
305 u32 t1_espi_get_mon(adapter_t *adapter, u32 addr, u8 wait) in t1_espi_get_mon()
308 u32 sel; in t1_espi_get_mon()
[all …]
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| /openbmc/linux/drivers/net/ethernet/renesas/ |
| H A D | ravb_ptp.c | 11 static int ravb_ptp_tcr_request(struct ravb_private *priv, u32 request) in ravb_ptp_tcr_request()
47 u32 gccr; in ravb_ptp_time_write()
73 u32 gti_ns_plus_1 = (priv->ptp.current_addend >> 20) + 1; in ravb_ptp_update_compare()
74 u32 gccr; in ravb_ptp_update_compare()
97 u32 addend; in ravb_ptp_adjfine()
98 u32 gccr; in ravb_ptp_adjfine()
100 addend = (u32)adjust_by_scaled_ppm(priv->ptp.default_addend, in ravb_ptp_adjfine()
245 perout->target = (u32)start_ns; in ravb_ptp_perout()
246 perout->period = (u32)period_ns; in ravb_ptp_perout()
247 error = ravb_ptp_update_compare(priv, (u32)start_ns); in ravb_ptp_perout()
[all …]
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_vblank.c | 66 u32 i915_get_vblank_counter(struct drm_crtc *crtc) in i915_get_vblank_counter()
72 u32 pixel, vbl_start, hsync_start, htotal; in i915_get_vblank_counter()
119 u32 g4x_get_vblank_counter(struct drm_crtc *crtc) in g4x_get_vblank_counter()
137 u32 htotal = mode->crtc_htotal; in intel_crtc_scanlines_since_frame_timestamp()
138 u32 clock = mode->crtc_clock; in intel_crtc_scanlines_since_frame_timestamp()
139 u32 scan_prev_time, scan_curr_time, scan_post_time; in intel_crtc_scanlines_since_frame_timestamp()
178 static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc) in __intel_get_crtc_scanline_from_timestamp()
183 u32 vblank_start = mode->crtc_vblank_start; in __intel_get_crtc_scanline_from_timestamp()
184 u32 vtotal = mode->crtc_vtotal; in __intel_get_crtc_scanline_from_timestamp()
185 u32 scanline; in __intel_get_crtc_scanline_from_timestamp()
[all …]
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| /openbmc/linux/sound/soc/tegra/ |
| H A D | tegra210_peq.c | 31 static const u32 biquad_init_gains[TEGRA210_PEQ_GAIN_PARAM_SIZE_PER_CH] = {
152 u32 i, reg_ctrl = params->soc.base; in tegra210_peq_ram_get()
153 u32 reg_data = reg_ctrl + cmpnt->val_bytes; in tegra210_peq_ram_get()
175 u32 i, reg_ctrl = params->soc.base; in tegra210_peq_ram_put()
176 u32 reg_data = reg_ctrl + cmpnt->val_bytes; in tegra210_peq_ram_put()
313 void tegra210_peq_restore(struct regmap *regmap, u32 *biquad_gains, in tegra210_peq_restore()
314 u32 *biquad_shifts) in tegra210_peq_restore()
335 void tegra210_peq_save(struct regmap *regmap, u32 *biquad_gains, in tegra210_peq_save()
336 u32 *biquad_shifts) in tegra210_peq_save()
379 (u32 *)&biquad_init_gains, in tegra210_peq_component_init()
[all …]
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| /openbmc/linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_common.h | 35 enum ice_aq_res_access_type access, u32 timeout);
57 u32 rxq_index);
166 u32 ice_get_link_speed(u16 index);
173 u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
175 ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
179 u16 *q_handle, u16 *q_ids, u32 *q_teids,
200 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
203 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
208 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
212 u32 value, struct ice_sq_cd *cd);
[all …]
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| /openbmc/linux/drivers/thermal/intel/ |
| H A D | intel_soc_dts_iosf.c | 47 u32 temp_out; in update_trip_temp()
48 u32 out; in update_trip_temp()
50 u32 store_ptps; in update_trip_temp()
51 u32 store_ptmc; in update_trip_temp()
52 u32 store_te_out; in update_trip_temp()
53 u32 te_out; in update_trip_temp()
169 u32 out; in sys_get_curr_temp()
194 u32 out; in soc_dts_enable()
228 u32 store_ptps; in add_dts_thermal_zone()
283 u32 sticky_out; in intel_soc_dts_iosf_interrupt_handler()
[all …]
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| /openbmc/linux/drivers/spi/ |
| H A D | spi-amd.c | 81 u32 speed_hz;
82 u32 enable_val;
83 u32 spd7_val;
116 static inline u32 amd_spi_readreg32(struct amd_spi *amd_spi, int idx) in amd_spi_readreg32()
121 static inline void amd_spi_writereg32(struct amd_spi *amd_spi, int idx, u32 val) in amd_spi_writereg32()
126 static inline void amd_spi_setclear_reg32(struct amd_spi *amd_spi, int idx, u32 set, u32 clear) in amd_spi_setclear_reg32()
128 u32 tmp = amd_spi_readreg32(amd_spi, idx); in amd_spi_setclear_reg32()
176 u32 val; in amd_spi_busy_wait()
239 static int amd_set_spi_freq(struct amd_spi *amd_spi, u32 speed_hz) in amd_set_spi_freq()
282 u32 i = 0; in amd_spi_fifo_xfer()
[all …]
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| /openbmc/linux/drivers/mtd/nand/raw/bcm47xxnflash/ |
| H A D | ops_bcm4706.c | 43 static int bcm47xxnflash_ops_bcm4706_ctl_cmd(struct bcma_drv_cc *cc, u32 code) in bcm47xxnflash_ops_bcm4706_ctl_cmd()
91 u32 ctlcode; in bcm47xxnflash_ops_bcm4706_read()
92 u32 *dest = (u32 *)buf; in bcm47xxnflash_ops_bcm4706_read()
142 u32 ctlcode; in bcm47xxnflash_ops_bcm4706_write()
143 const u32 *data = (u32 *)buf; in bcm47xxnflash_ops_bcm4706_write()
173 u32 code = 0; in bcm47xxnflash_ops_bcm4706_cmd_ctrl()
216 u32 ctlcode; in bcm47xxnflash_ops_bcm4706_cmdfunc()
312 u32 tmp = 0; in bcm47xxnflash_ops_bcm4706_read_byte()
374 u32 freq; in bcm47xxnflash_ops_bcm4706_init()
380 u32 val; in bcm47xxnflash_ops_bcm4706_init()
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| /openbmc/linux/drivers/gpu/drm/bridge/imx/ |
| H A D | imx8qxp-pixel-combiner.c | 82 imx8qxp_pc_write(struct imx8qxp_pc *pc, unsigned int offset, u32 value) in imx8qxp_pc_write()
88 imx8qxp_pc_write_set(struct imx8qxp_pc *pc, unsigned int offset, u32 value) in imx8qxp_pc_write_set()
94 imx8qxp_pc_write_clr(struct imx8qxp_pc *pc, unsigned int offset, u32 value) in imx8qxp_pc_write_clr()
139 u32 val; in imx8qxp_pc_bridge_mode_set()
197 static const u32 imx8qxp_pc_bus_output_fmts[] = {
202 static bool imx8qxp_pc_bus_output_fmt_supported(u32 fmt) in imx8qxp_pc_bus_output_fmt_supported()
214 static u32 *
219 u32 output_fmt, in imx8qxp_pc_bridge_atomic_get_input_bus_fmts()
222 u32 *input_fmts; in imx8qxp_pc_bridge_atomic_get_input_bus_fmts()
249 static u32 *
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | tonga_ih.c | 62 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_enable_interrupts()
79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_disable_interrupts()
104 u32 interrupt_cntl, ih_rb_cntl, ih_doorbell_rtpr; in tonga_ih_irq_init()
195 u32 wptr, tmp; in tonga_ih_get_wptr()
247 u32 ring_index = ih->rptr >> 2; in tonga_ih_decode_iv()
365 u32 tmp = RREG32(mmSRBM_STATUS); in tonga_ih_is_idle()
376 u32 tmp; in tonga_ih_wait_for_idle()
392 u32 srbm_soft_reset = 0; in tonga_ih_check_soft_reset()
393 u32 tmp = RREG32(mmSRBM_STATUS); in tonga_ih_check_soft_reset()
431 u32 srbm_soft_reset; in tonga_ih_soft_reset()
[all …]
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| H A D | nbio_v6_1.c | 64 static u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev) in nbio_v6_1_get_rev_id()
66 u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0); in nbio_v6_1_get_rev_id()
84 static u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev) in nbio_v6_1_get_memsize()
95 u32 doorbell_range = RREG32(reg); in nbio_v6_1_sdma_doorbell_range()
116 u32 tmp = 0; in nbio_v6_1_enable_doorbell_selfring_aperture()
136 u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE); in nbio_v6_1_ih_doorbell_range()
150 u32 interrupt_cntl; in nbio_v6_1_ih_control()
228 static u32 nbio_v6_1_get_hdp_flush_req_offset(struct amdgpu_device *adev) in nbio_v6_1_get_hdp_flush_req_offset()
233 static u32 nbio_v6_1_get_hdp_flush_done_offset(struct amdgpu_device *adev) in nbio_v6_1_get_hdp_flush_done_offset()
238 static u32 nbio_v6_1_get_pcie_index_offset(struct amdgpu_device *adev) in nbio_v6_1_get_pcie_index_offset()
[all …]
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| /openbmc/linux/drivers/gpu/drm/vmwgfx/ |
| H A D | vmwgfx_so.c | 72 u32 cmd_size; /* Immutable */
74 u32 cmd[]; /* Immutable */
259 static u32 vmw_view_key(u32 user_key, enum vmw_view_type view_type) in vmw_view_key()
273 static bool vmw_view_id_ok(u32 user_key, enum vmw_view_type view_type) in vmw_view_id_ok()
314 u32 user_key, in vmw_view_add()
395 u32 user_key, enum vmw_view_type view_type, in vmw_view_remove()
478 u32 user_key) in vmw_view_lookup()
496 u32 vmw_view_dirtying(struct vmw_resource *res) in vmw_view_dirtying()
498 static u32 view_is_dirtying[vmw_view_max] = { in vmw_view_dirtying()
509 const u32 vmw_view_destroy_cmds[] = {
[all …]
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| /openbmc/linux/drivers/mailbox/ |
| H A D | sprd-mailbox.c | 66 u32 outbox_fifo_depth;
69 u32 refcnt;
78 static u32 sprd_mbox_get_fifo_len(struct sprd_mbox_priv *priv, u32 fifo_sts) in sprd_mbox_get_fifo_len()
80 u32 wr_pos = (fifo_sts >> SPRD_OUTBOX_FIFO_WR_SHIFT) & in sprd_mbox_get_fifo_len()
82 u32 rd_pos = (fifo_sts >> SPRD_OUTBOX_FIFO_RD_SHIFT) & in sprd_mbox_get_fifo_len()
84 u32 fifo_len; in sprd_mbox_get_fifo_len()
107 u32 fifo_sts, fifo_len, msg[2]; in do_outbox_isr()
158 u32 fifo_sts, send_sts, busy, id; in sprd_mbox_inbox_isr()
200 u32 *data = msg; in sprd_mbox_send_data()
219 u32 busy; in sprd_mbox_flush()
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| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-mt7621.c | 36 u32 rising;
37 u32 falling;
38 u32 hlevel;
39 u32 llevel;
66 mtk_gpio_w32(struct mtk_gc *rg, u32 offset, u32 val) in mtk_gpio_w32()
75 static inline u32
76 mtk_gpio_r32(struct mtk_gc *rg, u32 offset) in mtk_gpio_r32()
112 u32 rise, fall, high, low; in mediatek_gpio_irq_unmask()
135 u32 rise, fall, high, low; in mediatek_gpio_irq_mask()
157 u32 mask = BIT(pin); in mediatek_gpio_irq_type()
[all …]
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