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/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson6.dtsi51 clocks = <&xtal>, <&clk81>;
52 clock-names = "xtal", "pclk";
56 clocks = <&xtal>, <&clk81>, <&clk81>;
57 clock-names = "xtal", "pclk", "baud";
61 clocks = <&xtal>, <&clk81>, <&clk81>;
62 clock-names = "xtal", "pclk", "baud";
66 clocks = <&xtal>, <&clk81>, <&clk81>;
67 clock-names = "xtal", "pclk", "baud";
71 clocks = <&xtal>, <&clk81>, <&clk81>;
72 clock-names = "xtal", "pclk", "baud";
H A Dmeson8.dtsi256 clocks = <&xtal>;
257 clock-names = "xtal";
581 xtal_32k_out_pins: xtal-32k-out {
584 function = "xtal";
630 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
631 clock-names = "xtal", "ddr_pll";
719 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
728 clocks = <&xtal>,
754 clocks = <&xtal>, <&clkc CLKID_CLK81>;
755 clock-names = "xtal", "pclk";
[all …]
H A Dmeson8b.dtsi233 clocks = <&xtal>;
234 clock-names = "xtal";
591 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
592 clock-names = "xtal", "ddr_pll";
694 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
703 clocks = <&xtal>,
725 clocks = <&xtal>, <&clkc CLKID_CLK81>;
726 clock-names = "xtal", "pclk";
731 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
732 clock-names = "xtal", "pclk", "baud";
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-t7-a311d2-an400.dts27 xtal: xtal-clk { label
30 clock-output-names = "xtal";
36 clocks = <&xtal>, <&xtal>, <&xtal>;
37 clock-names = "xtal", "pclk", "baud";
H A Damlogic-t7-a311d2-khadas-vim4.dts41 xtal: xtal-clk { label
44 clock-output-names = "xtal";
52 clocks = <&xtal>, <&xtal>, <&xtal>;
53 clock-names = "xtal", "pclk", "baud";
H A Dmeson-a1.dtsi115 clocks = <&xtal>, <&xtal>, <&xtal>;
116 clock-names = "xtal", "pclk", "baud";
125 clocks = <&xtal>, <&xtal>, <&xtal>;
126 clock-names = "xtal", "pclk", "baud";
167 xtal: xtal-clk { label
170 clock-output-names = "xtal";
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
322 assigned-clock-parents = <&xtal>, <0>;
330 clocks = <&xtal>;
331 clock-names = "xtal";
789 clocks = <&xtal>,
838 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
839 clock-names = "xtal", "pclk", "baud";
843 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
844 clock-names = "xtal", "pclk", "baud";
[all …]
H A Dmeson-gxl.dtsi310 clocks = <&xtal>, <&clkc CLKID_CLK81>;
311 clock-names = "xtal", "mpeg-clk";
334 assigned-clock-parents = <&xtal>, <0>;
342 clocks = <&xtal>;
343 clock-names = "xtal";
859 clocks = <&xtal>,
908 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
909 clock-names = "xtal", "pclk", "baud";
913 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
914 clock-names = "xtal", "pclk", "baud";
[all …]
H A Damlogic-c3.dtsi43 xtal: xtal-clk { label
46 clock-output-names = "xtal";
116 clocks = <&xtal>, <&xtal>, <&xtal>;
117 clock-names = "xtal", "pclk", "baud";
H A Dmeson-s4.dtsi57 xtal: xtal-clk { label
60 clock-output-names = "xtal";
131 clocks = <&xtal>, <&xtal>, <&xtal>;
132 clock-names = "xtal", "pclk", "baud";
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Darmada3700-xtal-clock.txt1 * Xtal Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
12 "marvell,armada-3700-xtal-clock"
17 output names ("xtal")
24 xtalclk: xtal-clk {
25 compatible = "marvell,armada-3700-xtal-clock";
26 clock-output-names = "xtal";
H A Dsilabs,si5351.txt23 handles, shall be xtal reference clock or xtal and clkin for
24 si5351c only. Corresponding clock input names are "xtal" and
46 2 = xtal
78 /* connect xtal input to 25MHz reference */
80 clock-names = "xtal";
82 /* connect xtal input as source of pll0 and pll1 */
119 * - xtal as clock source of output divider
H A Dmarvell,armada-3700-uart-clock.yaml23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
28 used for UART (most probably xtal) for smooth boot log on UART.
36 - const: xtal
57 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
/openbmc/linux/drivers/clk/pistachio/
H A Dclk-pistachio.c70 DIV(CLK_RPU_SLEEP_DIV, "rpu_sleep_div", "xtal", 0x224, 10),
105 PNAME(mux_xtal_audio_refclk) = { "xtal", "audio_clk_in_gate" };
106 PNAME(mux_xtal_mips) = { "xtal", "mips_pll" };
107 PNAME(mux_xtal_audio) = { "xtal", "audio_pll", "audio_in" };
109 PNAME(mux_xtal_rpu_v) = { "xtal", "rpu_v_pll" };
110 PNAME(mux_xtal_rpu_l) = { "xtal", "rpu_l_pll" };
112 PNAME(mux_xtal_wifi) = { "xtal", "wifi_pll" };
113 PNAME(mux_xtal_wifi_div4) = { "xtal", "wifi_div4" };
114 PNAME(mux_xtal_wifi_div8) = { "xtal", "wifi_div8" };
117 PNAME(mux_xtal_sys) = { "xtal", "sys_pll" };
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dclk.c34 u32 val, ctrl, xtal, pll, div; in get_clocks() local
39 xtal = qca953x_get_xtal(); in get_clocks()
43 /* VCOOUT = XTAL * DIV_INT */ in get_clocks()
46 pll = xtal / div; in get_clocks()
65 /* VCOOUT = XTAL * DIV_INT */ in get_clocks()
68 pll = xtal / div; in get_clocks()
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Damlogic,meson-uart.yaml68 - description: external xtal clock identifier
70 - description: the source of the baudrate generator, can be either the xtal or the pclk
74 - const: xtal
98 clocks = <&xtal>, <&pclk>, <&xtal>;
99 clock-names = "xtal", "pclk", "baud";
/openbmc/linux/drivers/media/dvb-frontends/
H A Dcxd2841er.c60 enum cxd2841er_xtal xtal; member
312 static u32 cxd2841er_calc_iffreq_xtal(enum cxd2841er_xtal xtal, u32 ifhz) in cxd2841er_calc_iffreq_xtal() argument
317 do_div(tmp, ((xtal == SONY_XTAL_24000) ? 48000000 : 41000000)); in cxd2841er_calc_iffreq_xtal()
792 switch (priv->xtal) { in cxd2841er_shutdown_to_sleep_s()
805 dev_dbg(&priv->i2c->dev, "%s(): invalid demod xtal %d\n", in cxd2841er_shutdown_to_sleep_s()
806 __func__, priv->xtal); in cxd2841er_shutdown_to_sleep_s()
854 switch (priv->xtal) { in cxd2841er_shutdown_to_sleep_tc()
2122 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x0E:0x0C; in cxd2841er_dvbt2_set_profile()
2127 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x2E:0x28; in cxd2841er_dvbt2_set_profile()
2132 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x2E:0x28; in cxd2841er_dvbt2_set_profile()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxbb.dtsi706 clocks = <&xtal>,
749 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
750 clock-names = "xtal", "pclk", "baud";
754 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
755 clock-names = "xtal", "pclk", "baud";
759 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
760 clock-names = "xtal", "pclk", "baud";
764 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
765 clock-names = "xtal", "pclk", "baud";
769 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
[all …]
H A Dmeson-gxl.dtsi707 clocks = <&xtal>,
750 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
751 clock-names = "xtal", "pclk", "baud";
755 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
756 clock-names = "xtal", "pclk", "baud";
760 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
761 clock-names = "xtal", "pclk", "baud";
765 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
766 clock-names = "xtal", "pclk", "baud";
770 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
[all …]
/openbmc/linux/drivers/clk/ralink/
H A Dclk-mtmips.c172 { CLK_PERIPH("480000.wmac", "xtal") }
185 { CLK_PERIPH("10180000.wmac", "xtal") }
198 { CLK_PERIPH("10180000.wmac", "xtal") }
210 { CLK_PERIPH("10180000.wmac", "xtal") }
223 { CLK_PERIPH("10300000.wmac", "xtal") }
267 CLK_FIXED("xtal", NULL, 40000000),
268 CLK_FIXED("periph", "xtal", 40000000)
272 CLK_FIXED("periph", "xtal", 40000000)
276 CLK_FIXED("pcmi2s", "xtal", 480000000),
277 CLK_FIXED("periph", "xtal", 40000000)
[all …]
/openbmc/linux/drivers/media/pci/cx18/
H A Dcx18-av-audio.c66 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
70 /* xtal * 0xd.bb3a060/0x20 = 32000 * 384: 393 MHz p-pd*/ in set_audclk_freq()
74 /* 0x1.f77f = (4 * xtal/8*2/455) / 32000 */ in set_audclk_freq()
101 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
105 /* xtal * 0xe.3150f90/0x18 = 44100 * 384: 406 MHz p-pd*/ in set_audclk_freq()
109 /* 0x1.6d59 = (4 * xtal/8*2/455) / 44100 */ in set_audclk_freq()
136 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
140 /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz p-pd*/ in set_audclk_freq()
144 /* 0x1.4faa = (4 * xtal/8*2/455) / 48000 */ in set_audclk_freq()
173 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dclk.c34 u32 val, xtal, pll, div; in get_clocks() local
38 xtal = ar933x_get_xtal(); in get_clocks()
41 /* VCOOUT = XTAL * DIV_INT */ in get_clocks()
44 pll = xtal / div; in get_clocks()
/openbmc/linux/drivers/clk/mvebu/
H A Darmada-37xx-xtal.c3 * Marvell Armada 37xx SoC xtal clocks
22 const char *xtal_name = "xtal"; in armada_3700_xtal_clock_probe()
74 { .compatible = "marvell,armada-3700-xtal-clock", },
82 .name = "marvell-armada-3700-xtal-clock",
/openbmc/linux/drivers/clk/renesas/
H A Drcar-usb2-clock-sel.c40 bool xtal; member
49 priv->extal, priv->xtal, val); in usb2_clock_sel_enable_extal_only()
51 if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY) in usb2_clock_sel_enable_extal_only()
57 if (priv->extal && !priv->xtal) in usb2_clock_sel_disable_extal_only()
169 priv->xtal = !!clk_get_rate(clk); in rcar_usb2_clock_sel_probe()
173 if (!priv->extal && !priv->xtal) { in rcar_usb2_clock_sel_probe()
/openbmc/linux/Documentation/devicetree/bindings/net/ieee802154/
H A Dat86rf230.txt15 - xtal-trim: u8 value for fine tuning the internal capacitance
16 arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF
26 xtal-trim = /bits/ 8 <0x06>;

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