1*9b0d5d4bSPali Rohár# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*9b0d5d4bSPali Rohár%YAML 1.2
3*9b0d5d4bSPali Rohár---
4*9b0d5d4bSPali Rohár$id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml#
5*9b0d5d4bSPali Rohár$schema: http://devicetree.org/meta-schemas/core.yaml#
6*9b0d5d4bSPali Rohártitle: Marvell Armada 3720 UART clocks
7*9b0d5d4bSPali Rohár
8*9b0d5d4bSPali Rohármaintainers:
9*9b0d5d4bSPali Rohár  - Pali Rohár <pali@kernel.org>
10*9b0d5d4bSPali Rohár
11*9b0d5d4bSPali Rohárproperties:
12*9b0d5d4bSPali Rohár  compatible:
13*9b0d5d4bSPali Rohár    const: marvell,armada-3700-uart-clock
14*9b0d5d4bSPali Rohár
15*9b0d5d4bSPali Rohár  reg:
16*9b0d5d4bSPali Rohár    items:
17*9b0d5d4bSPali Rohár      - description: UART Clock Control Register
18*9b0d5d4bSPali Rohár      - description: UART 2 Baud Rate Divisor Register
19*9b0d5d4bSPali Rohár
20*9b0d5d4bSPali Rohár  clocks:
21*9b0d5d4bSPali Rohár    description: |
22*9b0d5d4bSPali Rohár      List of parent clocks suitable for UART from following set:
23*9b0d5d4bSPali Rohár        "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
24*9b0d5d4bSPali Rohár      UART clock can use one from this set and when more are provided
25*9b0d5d4bSPali Rohár      then kernel would choose and configure the most suitable one.
26*9b0d5d4bSPali Rohár      It is suggest to specify at least one TBG clock to achieve
27*9b0d5d4bSPali Rohár      baudrates above 230400 and also to specify clock which bootloader
28*9b0d5d4bSPali Rohár      used for UART (most probably xtal) for smooth boot log on UART.
29*9b0d5d4bSPali Rohár
30*9b0d5d4bSPali Rohár  clock-names:
31*9b0d5d4bSPali Rohár    items:
32*9b0d5d4bSPali Rohár      - const: TBG-A-P
33*9b0d5d4bSPali Rohár      - const: TBG-B-P
34*9b0d5d4bSPali Rohár      - const: TBG-A-S
35*9b0d5d4bSPali Rohár      - const: TBG-B-S
36*9b0d5d4bSPali Rohár      - const: xtal
37*9b0d5d4bSPali Rohár    minItems: 1
38*9b0d5d4bSPali Rohár
39*9b0d5d4bSPali Rohár  '#clock-cells':
40*9b0d5d4bSPali Rohár    const: 1
41*9b0d5d4bSPali Rohár
42*9b0d5d4bSPali Rohárrequired:
43*9b0d5d4bSPali Rohár  - compatible
44*9b0d5d4bSPali Rohár  - reg
45*9b0d5d4bSPali Rohár  - clocks
46*9b0d5d4bSPali Rohár  - clock-names
47*9b0d5d4bSPali Rohár  - '#clock-cells'
48*9b0d5d4bSPali Rohár
49*9b0d5d4bSPali RoháradditionalProperties: false
50*9b0d5d4bSPali Rohár
51*9b0d5d4bSPali Rohárexamples:
52*9b0d5d4bSPali Rohár  - |
53*9b0d5d4bSPali Rohár    uartclk: clock-controller@12010 {
54*9b0d5d4bSPali Rohár      compatible = "marvell,armada-3700-uart-clock";
55*9b0d5d4bSPali Rohár      reg = <0x12010 0x4>, <0x12210 0x4>;
56*9b0d5d4bSPali Rohár      clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
57*9b0d5d4bSPali Rohár      clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
58*9b0d5d4bSPali Rohár      #clock-cells = <1>;
59*9b0d5d4bSPali Rohár    };
60