Home
last modified time | relevance | path

Searched +full:txrx +full:- +full:3 (Results 1 – 25 of 78) sorted by relevance

1234

/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dengleder,tsnep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gerhard Engleder <gerhard@engleder-embedded.com>
13 - $ref: ethernet-controller.yaml#
26 interrupt-names:
29 - const: mac
30 - const: txrx-1
31 - const: txrx-2
32 - const: txrx-3
[all …]
/openbmc/linux/arch/mips/include/asm/sibyte/
H A Dsb1250_mac.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
30 * MAC Configuration Register (Table 9-13)
40 #define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3)
45 #define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3, S_MAC_TX_PAUSE)
51 #define K_MAC_TX_PAUSE_CNT_4K 3
94 #define K_MAC_SPEED_SEL_RESERVED 3
114 #define K_MAC_BYPASS_EOP 3
202 * MAC Fifo Threshold registers (Table 9-14)
258 * MAC Frame Configuration Registers (Table 9-15)
360 * MAC VLAN Tag Registers (Table 9-16)
[all …]
H A Dsb1250_regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * This module contains the addresses of the on-chip peripherals
114 /* Backward-compatibility definitions. */
150 #define MAC_NUM_PORTS 3
163 #define A_MAC_DMA_CHANNEL_BASE(macnum, txrx, chan) \ argument
166 (MAC_DMA_TXRX_SPACING*(txrx)) + \
169 #define R_MAC_DMA_CHANNEL_BASE(txrx, chan) \ argument
171 (MAC_DMA_TXRX_SPACING*(txrx)) + \
174 #define A_MAC_DMA_REGISTER(macnum, txrx, chan, reg) \ argument
175 (A_MAC_DMA_CHANNEL_BASE(macnum, txrx, chan) + \
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dhal_btc.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
19 if (!rtlpriv->btcoexist.bt_coexistence) in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
22 if (ppsc->inactiveps) { in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
25 rtlpriv->btcoexist.cstate = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
26 rtlpriv->btcoexist.previous_state = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
27 rtlpriv->btcoexist.cstate_h = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
28 rtlpriv->btcoexist.previous_state_h = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
38 u8 bibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ? 1 : 0; in mgnt_link_status_query()
39 if (bibss || rtlpriv->mac80211.link_state >= MAC80211_LINKED) in mgnt_link_status_query()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dts-nbus.txt4 Systems FPGA on the TS-4600 SoM.
7 - compatible : "technologic,ts-nbus"
8 - #address-cells : must be 1
9 - #size-cells : must be 0
10 - pwms : The PWM bound to the FPGA
11 - ts,data-gpios : The 8 GPIO pins connected to the data lines on the FPGA
12 - ts,csn-gpios : The GPIO pin connected to the csn line on the FPGA
13 - ts,txrx-gpios : The GPIO pin connected to the txrx line on the FPGA
14 - ts,strobe-gpios : The GPIO pin connected to the stobe line on the FPGA
15 - ts,ale-gpios : The GPIO pin connected to the ale line on the FPGA
[all …]
/openbmc/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_soc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
24 #include <linux/pcs/pcs-mtk-lynxi.h>
34 static int mtk_msg_level = -1;
36 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
284 __raw_writel(val, eth->base + reg); in mtk_w32()
289 return __raw_readl(eth->base + reg); in mtk_r32()
315 dev_err(eth->dev, "mdio: MDIO timeout\n"); in mtk_mdio_busy_wait()
[all …]
H A Dmtk_eth_soc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
12 #include <linux/dma-mapping.h>
55 #define NEXT_DESP_IDX(X, Y) (((X) + 1) & ((Y) - 1))
60 #define MTK_PP_MAX_BUF_SIZE (PAGE_SIZE - MTK_PP_PAD)
67 #define MTK_MAX_LRO_RX_LENGTH (4096 * 3)
134 /* Unicast Filter MAC Address Register - Low */
138 /* Unicast Filter MAC Address Register - High */
[all …]
/openbmc/linux/samples/pktgen/
H A Dfunctions.sh3 # - Depending on bash 3 (or higher) syntax
8 set -o errexit
10 ## -- General shell logging cmds --
23 if [[ -n "$VERBOSE" ]]; then
28 ## -- Pktgen proc config commands -- ##
67 if [[ ! -e "$proc_ctrl" ]]; then
68 err 3 "proc file:$proc_ctrl does not exists (dev added to thread?)"
70 if [[ ! -w "$proc_ctrl" ]]; then
114 if [[ -z "$APPEND" ]] && [[ $EUID -eq 0 ]]; then
119 ## -- General shell tricks --
[all …]
/openbmc/linux/drivers/tty/serial/jsm/
H A Djsm_neo.c1 // SPDX-License-Identifier: GPL-2.0+
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
54 writeb(efr, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
57 writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr); in neo_set_cts_flow_control()
[all …]
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dsb1250-mac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * This driver is designed for the Broadcom SiByte SOC built-in
48 /* A few user-configurable values which may be modified when a driver
116 sbmac_duplex_none = -1,
142 #define SBDMA_NEXTBUF(d,f) ((((d)->f+1) == (d)->sbdma_dscrtable_end) ? \
143 (d)->sbdma_dscrtable : (d)->f+1)
222 * Linux-specific things
232 * Controller-specific things
270 int txrx, int maxdescr);
318 static char sbmac_string[] = "sb1250-mac";
[all …]
/openbmc/linux/drivers/net/wireless/st/cw1200/
H A Dcw1200.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Common private data for ST-Ericsson CW1200 drivers
5 * Copyright (c) 2010, ST-Ericsson
12 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
26 #include "txrx.h"
40 #define CW1200_LINK_ID_MAX (CW1200_MAX_STA_IN_AP_MODE + 3)
47 #define CW1200_BLOCK_ACK_HIST (3)
302 return ht_info->channel_type != NL80211_CHAN_NO_HT; in cw1200_is_ht()
308 (ht_info->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) && in cw1200_ht_greenfield()
309 !(ht_info->operation_mode & in cw1200_ht_greenfield()
[all …]
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mac80211 glue code for mac80211 ST-Ericsson CW1200 drivers
5 * Copyright (c) 2010, ST-Ericsson
10 * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
14 * - the islsm (softmac prism54) driver, which is:
15 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
16 * - stlc45xx driver
17 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
29 #include "txrx.h"
40 MODULE_DESCRIPTION("Softmac ST-Ericsson CW1200 common code");
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-sh-sci.c1 // SPDX-License-Identifier: GPL-2.0-only
33 #define SCSPTR(sp) (sp->membase + 0x1c)
37 #define PIN_INIT ((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD)
45 * This makes regular read-modify-write difficult so we in setbits()
46 * use sp->val to keep track of the latest register value. in setbits()
50 sp->val |= bits; in setbits()
52 sp->val &= ~bits; in setbits()
54 iowrite8(sp->val, SCSPTR(sp)); in setbits()
59 setbits(spi_controller_get_devdata(dev->controller), PIN_SCK, on); in setsck()
64 setbits(spi_controller_get_devdata(dev->controller), PIN_TXD, on); in setmosi()
[all …]
H A Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 * platform_device->driver_data ... points to spi_gpio
27 * spi->controller_state ... reserved for bitbang framework code
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
40 /*----------------------------------------------------------------------*/
47 * - The slow generic way: set up platform_data to hold the GPIO
51 * - The quicker inlined way: only helps with platform GPIO code
62 * #include "spi-gpio.c"
72 /*----------------------------------------------------------------------*/
80 bang = spi_controller_get_devdata(spi->controller); in spi_to_spi_gpio()
[all …]
H A Dspi-mxs.c1 // SPDX-License-Identifier: GPL-2.0+
15 // Based on code from U-Boot bootloader by:
18 // Based on spi-stmp.c, which is:
28 #include <linux/dma-mapping.h>
40 #include <linux/spi/mxs-spi.h>
43 #define DRIVER_NAME "mxs-spi"
51 * Flags for txrx functions. More efficient that using an argument register for
55 #define TXRX_DEASSERT_CS (1<<1) /* De-assert CS at end of txrx */
66 struct mxs_spi *spi = spi_master_get_devdata(dev->master); in mxs_spi_setup_transfer()
67 struct mxs_ssp *ssp = &spi->ssp; in mxs_spi_setup_transfer()
[all …]
H A Dspi-lm70llp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for LM70EVAL-LLP board for the LM70 sensor
23 * The LM70 communicates with a host processor using a 3-wire variant of
26 * port to bitbang an SPI-parport bridge. Accordingly, this is an SPI
33 * The schematic for this particular board (the LM70EVAL-LLP) is
37 * Also see Documentation/spi/spi-lm70llp.rst. The SPI<->parport code here is
38 * (heavily) based on spi-butterfly by David Brownell.
44 * ----------- --------- ------------
45 * D0 2 - -
46 * D1 3 --> V+ 5
[all …]
H A Dspi-butterfly.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * parport-to-butterfly adapter
31 #define butterfly_nreset (1 << 1) /* pin 3 */
46 return spi->controller_data; in spidev_to_pp()
64 /*----------------------------------------------------------------------*/
70 u8 bit, byte = pp->lastbyte; in setsck()
78 parport_write_data(pp->port, byte); in setsck()
79 pp->lastbyte = byte; in setsck()
86 u8 bit, byte = pp->lastbyte; in setmosi()
94 parport_write_data(pp->port, byte); in setmosi()
[all …]
H A Dspi-ppc4xx.c1 // SPDX-License-Identifier: GPL-2.0-only
38 #include <asm/dcr-regs.h>
40 /* bits in mode register - bit 0 is MSb */
47 #define SPI_PPC4XX_MODE_SCP (0x80 >> 3)
53 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
54 * SPI_PPC4XX_MODE_RD = 1 means "LSB first" - this is bit-reversed mode
102 * CDM = (OPBCLK/4*SCPClkOut) - 1
142 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", in spi_ppc4xx_txrx()
143 t->tx_buf, t->rx_buf, t->len); in spi_ppc4xx_txrx()
145 hw = spi_controller_get_devdata(spi->controller); in spi_ppc4xx_txrx()
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dmpc52xx_psc.h2 * include/asm-ppc/mpc52xx_psc.h
6 * UART, AC97, IR, I2S, ... So this header is in asm-ppc.
62 /* PSC TxRx FIFO status bits */
157 u8 reserved0[3];
166 u8 reserved2[3];
181 u8 reserved3[3];
190 u8 reserved5[3];
192 u8 reserved6[3];
200 u8 reserved8[3];
202 u8 reserved9[3];
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath10k/
H A Dtxrx.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
9 #include "txrx.h"
18 if (likely(!(info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))) in ath10k_report_offchan_tx()
29 spin_lock_bh(&ar->data_lock); in ath10k_report_offchan_tx()
30 if (ar->offchan_tx_skb != skb) { in ath10k_report_offchan_tx()
35 complete(&ar->offchan_tx_completed); in ath10k_report_offchan_tx()
36 ar->offchan_tx_skb = NULL; /* just for sanity */ in ath10k_report_offchan_tx()
40 spin_unlock_bh(&ar->data_lock); in ath10k_report_offchan_tx()
[all …]
/openbmc/linux/drivers/net/can/
H A Dgrcan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * See "Documentation/ABI/testing/sysfs-class-net-grcan" for information on the
19 * See "Documentation/admin-guide/kernel-parameters.rst" for information on the module
38 #include <linux/dma-mapping.h>
44 #define GRCAN_RESERVE_SIZE(slot1, slot2) (((slot2) - (slot1)) / 4 - 1)
51 u32 smask; /* 0x18 - CanMASK */
52 u32 scode; /* 0x1c - CanCODE */
202 #define GRCAN_MSG_DATA_SHIFT(i) ((3 - (i) % 4) * 8)
264 * handling"-comment for grcan_start_xmit for more details.
371 return sum - size; in grcan_ring_add()
[all …]
/openbmc/linux/arch/sh/boards/
H A Dboard-magicpanelr2.c1 // SPDX-License-Identifier: GPL-2.0
65 /* CS2: LAN (0x08000000 - 0x0bffffff) */ in setup_chip_select()
68 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
71 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ in setup_chip_select()
74 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
77 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ in setup_chip_select()
80 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
83 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ in setup_chip_select()
86 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
89 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ in setup_chip_select()
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-ingenic.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <linux/pinctrl/pinconf-generic.h>
164 (!(enabled_socs & GENMASK(version - 1, 0)) in is_soc_or_above()
165 || jzpc->info->version >= version); in is_soc_or_above()
203 INGENIC_PIN_GROUP("mmc-1bit", jz4730_mmc_1bit, 1),
204 INGENIC_PIN_GROUP("mmc-4bit", jz4730_mmc_4bit, 1),
205 INGENIC_PIN_GROUP("uart0-data", jz4730_uart0_data, 1),
206 INGENIC_PIN_GROUP("uart1-data", jz4730_uart1_data, 1),
207 INGENIC_PIN_GROUP("uart2-data", jz4730_uart2_data, 1),
208 INGENIC_PIN_GROUP("uart3-data", jz4730_uart3_data, 1),
[all …]
/openbmc/qemu/hw/arm/
H A Dxilinx_zynq.c28 #include "hw/adc/zynq-xadc.h"
31 #include "qemu/error-report.h"
36 #include "hw/qdev-clock.h"
41 #include "target/arm/cpu-qom.h"
44 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
48 #define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3)
112 rom_add_blob_fixed("board-setup", board_setup_blob, in zynq_write_board_setup()
125 object_property_set_int(OBJECT(dev), "phy-addr", 7, &error_abort); in gem_init()
144 dev = qdev_new(is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); in zynq_init_spi_flashes()
145 qdev_prop_set_uint8(dev, "num-txrx-bytes", is_qspi ? 4 : 1); in zynq_init_spi_flashes()
[all …]
/openbmc/linux/drivers/net/wireless/ath/wil6210/
H A Dwil6210.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
67 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); in WIL_GET_BITS()
96 * 26 bytes - 3-address QoS data header
97 * 8 bytes - IV + EIV (for GCMP)
98 * 8 bytes - SNAP
99 * 16 bytes - MIC (for GCMP)
100 * 4 bytes - CRC
126 /* MTU for Ethernet need to take into account 8-byte SNAP header
[all …]

1234