1 /* SPDX-License-Identifier: GPL-2.0-or-later */
30  * MAC Configuration Register (Table 9-13)
40 #define M_MAC_RET_DRPREQ_EN	    _SB_MAKEMASK1(3)
45 #define M_MAC_TX_PAUSE_CNT	    _SB_MAKEMASK(3, S_MAC_TX_PAUSE)
51 #define K_MAC_TX_PAUSE_CNT_4K	    3
94 #define K_MAC_SPEED_SEL_RESERVED    3
114 #define K_MAC_BYPASS_EOP	    3
202  * MAC Fifo Threshold registers (Table 9-14)
258  * MAC Frame Configuration Registers (Table 9-15)
360  * MAC VLAN Tag Registers (Table 9-16)
386  * MAC Status Registers (Table 9-17)
387  * Also used for the MAC Interrupt Mask Register (Table 9-18)
413  *  and pass just the six bits to a DMA-channel-specific ISR
419 #define M_MAC_INT_HWM		    _SB_MAKEMASK1(3)
427  * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see
430 #define S_MAC_STATUS_CH_OFFSET(ch, txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH)  argument
432 #define M_MAC_STATUS_CHANNEL(ch, txrx)	 _SB_MAKEVALUE(_SB_MAKEMASK(8, 0), S_MAC_STATUS_CH_OFFSET(ch…  argument
433 #define M_MAC_STATUS_EOP_COUNT(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT, S_MAC_STATUS_CH_OFFSET(…  argument
434 #define M_MAC_STATUS_EOP_TIMER(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER, S_MAC_STATUS_CH_OFFSET(…  argument
435 #define M_MAC_STATUS_EOP_SEEN(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN, S_MAC_STATUS_CH_OFFSET(c…  argument
436 #define M_MAC_STATUS_HWM(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_HWM, S_MAC_STATUS_CH_OFFSET(ch, txrx))  argument
437 #define M_MAC_STATUS_LWM(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_LWM, S_MAC_STATUS_CH_OFFSET(ch, txrx))  argument
438 #define M_MAC_STATUS_DSCR(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_DSCR, S_MAC_STATUS_CH_OFFSET(ch, txrx))  argument
439 #define M_MAC_STATUS_ERR(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_ERR, S_MAC_STATUS_CH_OFFSET(ch, txrx))  argument
440 #define M_MAC_STATUS_DZERO(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_DZERO, S_MAC_STATUS_CH_OFFSET(ch, txr…  argument
441 #define M_MAC_STATUS_DROP(ch, txrx)	 _SB_MAKEVALUE(M_MAC_INT_DROP, S_MAC_STATUS_CH_OFFSET(ch, txrx))  argument
466  * MAC Fifo Pointer Registers (Table 9-19)    [Debug register]
493  * MAC Fifo End Of Packet Count Registers (Table 9-20)	[Debug register]
510  * MAC Receive Address Filter Exact Match Registers (Table 9-21)
528  * MAC Receive Address Filter Hash Match Registers (Table 9-22)
537  * MAC Transmit Source Address Registers (Table 9-23)
575  * MAC Receive Address Filter Control Registers (Table 9-24)
584 #define M_MAC_MCAST_EN		_SB_MAKEMASK1(3)
618  * MAC Receive Channel Select Registers (Table 9-25)
624  * MAC MII Management Interface Registers (Table 9-26)
633 #define S_MAC_GENC		3