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/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-scc-qmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
19 - enum:
20 - fsl,mpc885-scc-qmc
21 - fsl,mpc866-scc-qmc
22 - const: fsl,cpm1-scc-qmc
26 - description: SCC (Serial communication controller) register base
[all …]
/openbmc/linux/sound/soc/meson/
H A Daxg-tdm-interface.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <sound/soc-dai.h>
13 #include "axg-tdm.h"
23 static unsigned int axg_tdm_slots_total(u32 *mask) in axg_tdm_slots_total() argument
28 if (!mask) in axg_tdm_slots_total()
33 slots += hweight32(mask[i]); in axg_tdm_slots_total()
43 struct axg_tdm_stream *tx = snd_soc_dai_dma_data_get_playback(dai); in axg_tdm_set_tdm_slots() local
53 dev_err(dai->dev, "interface has no slot\n"); in axg_tdm_set_tdm_slots()
54 return -EINVAL; in axg_tdm_set_tdm_slots()
57 iface->slots = slots; in axg_tdm_set_tdm_slots()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/igc/
H A Digc_ptp.c1 // SPDX-License-Identifier: GPL-2.0
24 void igc_ptp_read(struct igc_adapter *adapter, struct timespec64 *ts) in igc_ptp_read() argument
26 struct igc_hw *hw = &adapter->hw; in igc_ptp_read()
33 ts->tv_sec = sec; in igc_ptp_read()
34 ts->tv_nsec = nsec; in igc_ptp_read()
38 const struct timespec64 *ts) in igc_ptp_write_i225() argument
40 struct igc_hw *hw = &adapter->hw; in igc_ptp_write_i225()
42 wr32(IGC_SYSTIML, ts->tv_nsec); in igc_ptp_write_i225()
43 wr32(IGC_SYSTIMH, ts->tv_sec); in igc_ptp_write_i225()
50 struct igc_hw *hw = &igc->hw; in igc_ptp_adjfine_i225()
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Docelot_ptp.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
19 int ocelot_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts) in ocelot_ptp_gettime64() argument
27 spin_lock_irqsave(&ocelot->ptp_clock_lock, flags); in ocelot_ptp_gettime64()
39 spin_unlock_irqrestore(&ocelot->ptp_clock_lock, flags); in ocelot_ptp_gettime64()
43 s--; in ocelot_ptp_gettime64()
48 set_normalized_timespec64(ts, s, ns); in ocelot_ptp_gettime64()
54 const struct timespec64 *ts) in ocelot_ptp_settime64() argument
60 spin_lock_irqsave(&ocelot->ptp_clock_lock, flags); in ocelot_ptp_settime64()
68 ocelot_write_rix(ocelot, lower_32_bits(ts->tv_sec), PTP_PIN_TOD_SEC_LSB, in ocelot_ptp_settime64()
70 ocelot_write_rix(ocelot, upper_32_bits(ts->tv_sec), PTP_PIN_TOD_SEC_MSB, in ocelot_ptp_settime64()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,qmc-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,qmc-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
18 - $ref: dai-common.yaml#
22 const: fsl,qmc-audio
24 '#address-cells':
26 '#size-cells':
28 '#sound-dai-cells':
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/openbmc/linux/drivers/net/ethernet/intel/igb/
H A Digb_ptp.c1 // SPDX-License-Identifier: GPL-2.0+
38 * +--------------+ +---+---+------+
40 * +--------------+ +---+---+------+
43 * +----------+---+ +--------------+
45 * +----------+---+ +--------------+
50 * 2^45 * 10^-9 / 3600 = 9.77 hours.
53 * 2^40 * 10^-9 / 60 = 18.3 minutes.
67 #define INCVALUE_82576_MASK GENMASK(E1000_TIMINCA_16NS_SHIFT - 1, 0)
79 struct e1000_hw *hw = &igb->hw; in igb_ptp_read_82576()
96 struct e1000_hw *hw = &igb->hw; in igb_ptp_read_82580()
[all …]
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dutils.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
5 * Copyright (C) 2015-2017 Intel Deutschland GmbH
9 #include "iwl-debug.h"
10 #include "iwl-io.h"
11 #include "iwl-prph.h"
12 #include "iwl-csr.h"
19 * CMD_WANT_SKB is set in cmd->flags.
26 if (WARN_ON(mvm->d3_test_active)) in iwl_mvm_send_cmd()
[all …]
/openbmc/linux/drivers/soc/fsl/qe/
H A Dqmc.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
44 /* SCC mask register (16 bits) */
52 /* Tx time-slot assignment table pointer (16 bits) */
64 /* Rx time-slot assignment table pointer (16 bits) */
66 /* Tx pointer (16 bits) */
72 /* Time slot assignment table Tx (32 x 16 bits) */
83 /* Tx buffer descriptor base address (16 bits, offset from MCBASE) */
98 /* Tx internal state (32 bits) */
100 /* Tx buffer descriptor pointer (16 bits) */
[all …]
/openbmc/linux/drivers/ptp/
H A Dptp_ines.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2018 MOSER-BAER AG
103 #define ines_read32(s, r) __raw_readl((void __iomem *)&s->regs->r)
104 #define ines_write32(s, v, r) __raw_writel(v, (void __iomem *)&s->regs->r)
171 struct ines_timestamp *ts, struct device *dev);
174 static bool ines_timestamp_expired(struct ines_timestamp *ts);
186 port = &clock->port[i]; in ines_clock_cleanup()
187 cancel_delayed_work_sync(&port->ts_work); in ines_clock_cleanup()
194 struct device_node *node = device->of_node; in ines_clock_init()
199 INIT_LIST_HEAD(&clock->list); in ines_clock_init()
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/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dxmit.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
17 #include <linux/dma-mapping.h>
33 #define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
35 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
49 { 104, 216 }, /* 3: 16-QAM 1/2 */
50 { 156, 324 }, /* 4: 16-QAM 3/4 */
51 { 208, 432 }, /* 5: 64-QAM 2/3 */
52 { 234, 486 }, /* 6: 64-QAM 3/4 */
53 { 260, 540 }, /* 7: 64-QAM 5/6 */
64 struct ath_tx_status *ts, int txok);
[all …]
H A Ddynack.c27 * ath_dynack_get_max_to - set max timeout according to channel width
33 const struct ath9k_channel *chan = ah->curchan; in ath_dynack_get_max_to()
48 * ath_dynack_ewma - EWMA (Exponentially Weighted Moving Average) calculation
53 return (new * (EWMA_DIV - EWMA_LEVEL) + in ath_dynack_ewma()
60 * ath_dynack_get_sifs - get sifs time based on phy used
70 if (IS_CHAN_QUARTER_RATE(ah->curchan)) in ath_dynack_get_sifs()
72 else if (IS_CHAN_HALF_RATE(ah->curchan)) in ath_dynack_get_sifs()
81 * ath_dynack_bssidmask - filter out ACK frames based on BSSID mask
91 if ((common->macaddr[i] & common->bssidmask[i]) != in ath_dynack_bssidmask()
92 (mac[i] & common->bssidmask[i])) in ath_dynack_bssidmask()
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath11k/
H A Ddp_tx.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
19 struct ath11k_base *ab = arvif->ar->ab; in ath11k_dp_tx_get_encap_type()
21 if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) in ath11k_dp_tx_get_encap_type()
24 if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) in ath11k_dp_tx_get_encap_type()
32 struct ieee80211_hdr *hdr = (void *)skb->data; in ath11k_dp_tx_encap_nwifi()
35 if (!ieee80211_is_data_qos(hdr->frame_control)) in ath11k_dp_tx_encap_nwifi()
39 memmove(skb->data + IEEE80211_QOS_CTL_LEN, in ath11k_dp_tx_encap_nwifi()
40 skb->data, (void *)qos_ctl - (void *)skb->data); in ath11k_dp_tx_encap_nwifi()
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath12k/
H A Ddp_tx.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
16 struct ath12k_base *ab = arvif->ar->ab; in ath12k_dp_tx_get_encap_type()
18 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) in ath12k_dp_tx_get_encap_type()
21 if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) in ath12k_dp_tx_get_encap_type()
29 struct ieee80211_hdr *hdr = (void *)skb->data; in ath12k_dp_tx_encap_nwifi()
32 if (!ieee80211_is_data_qos(hdr->frame_control)) in ath12k_dp_tx_encap_nwifi()
36 memmove(skb->data + IEEE80211_QOS_CTL_LEN, in ath12k_dp_tx_encap_nwifi()
37 skb->data, (void *)qos_ctl - (void *)skb->data); in ath12k_dp_tx_encap_nwifi()
[all …]
/openbmc/linux/drivers/net/ethernet/qlogic/qede/
H A Dqede_ptp.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
31 * qede_ptp_adjfine() - Adjust the frequency of the PTP cycle counter.
36 * Scaled parts per million is ppm with a 16-bit binary fractional field.
44 struct qede_dev *edev = ptp->edev; in qede_ptp_adjfine()
48 if (edev->state == QEDE_STATE_OPEN) { in qede_ptp_adjfine()
49 spin_lock_bh(&ptp->lock); in qede_ptp_adjfine()
50 rc = ptp->ops->adjfreq(edev->cdev, ppb); in qede_ptp_adjfine()
51 spin_unlock_bh(&ptp->lock); in qede_ptp_adjfine()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_ptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
30 * Period * [ 2 ^ ( MaxWidth - PeriodWidth ) ]
47 * +--------------+ +--------------+
49 * *--------------+ +--------------+
52 * +--------------+ +--------------+
54 * *--------------+ +--------------+
58 * 2^36 * 10^-9 / 60 = 1.14 minutes or 69 seconds
61 * 2^43 * 10^-9 / 3600 = 2.4 hours
89 * represents units of 2^-32 nanoseconds, and uses 31 bits for this, with the
[all …]
/openbmc/linux/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-tef.c1 // SPDX-License-Identifier: GPL-2.0
3 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver
6 // Marc Kleine-Budde <kernel@pengutronix.de>
36 err = regmap_read(priv->map_reg, MCP251XFD_REG_TEFUA, &tef_ua); in mcp251xfd_tef_tail_get_from_chip()
59 netdev_err(priv->ndev, in mcp251xfd_check_tef_tail()
62 return -EILSEQ; in mcp251xfd_check_tef_tail()
73 struct net_device_stats *stats = &priv->ndev->stats; in mcp251xfd_handle_tefif_one()
77 /* Use the MCP2517FD mask on the MCP2518FD, too. We only in mcp251xfd_handle_tefif_one()
81 hw_tef_obj->flags); in mcp251xfd_handle_tefif_one()
82 tef_tail_masked = priv->tef->tail & in mcp251xfd_handle_tefif_one()
[all …]
/openbmc/linux/drivers/net/phy/
H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
119 * The value is calculated as following: (1/1000000)/((2^-32)/4)
317 /* Lock for Rx ts fifo */
429 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
431 u16 mask; in kszphy_config_intr() local
433 if (type && type->interrupt_level_mask) in kszphy_config_intr()
434 mask = type->interrupt_level_mask; in kszphy_config_intr()
436 mask = KSZPHY_CTRL_INT_ACTIVE_HIGH; in kszphy_config_intr()
442 temp &= ~mask; in kszphy_config_intr()
[all …]
/openbmc/linux/include/linux/fsl/
H A Dptp_qoriq.h1 // SPDX-License-Identifier: GPL-2.0
19 u32 tmr_temask; /* Timer event mask register */
21 u32 tmr_pemask; /* Timer event mask register */
80 #define RTPE (1<<15) /* Record Tx Timestamp to PAL Enable. */
82 #define ESFDP (1<<11) /* External Tx/Rx SFD Polarity. */
83 #define ESFDE (1<<10) /* External Tx/Rx SFD Enable. */
192 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts);
194 const struct timespec64 *ts);
/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_b0.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
123 self->aq_fw_ops->set_state(self, MPI_RESET); in hw_atl_b0_hw_reset()
154 struct aq_nic_cfg_s *cfg = self->aq_nic_cfg; in hw_atl_b0_hw_qos_set()
160 if (cfg->is_ptp) { in hw_atl_b0_hw_qos_set()
161 tx_buff_size -= HW_ATL_B0_PTP_TXBUF_SIZE; in hw_atl_b0_hw_qos_set()
162 rx_buff_size -= HW_ATL_B0_PTP_RXBUF_SIZE; in hw_atl_b0_hw_qos_set()
172 tx_buff_size /= cfg->tcs; in hw_atl_b0_hw_qos_set()
173 rx_buff_size /= cfg->tcs; in hw_atl_b0_hw_qos_set()
[all …]
/openbmc/linux/drivers/pci/endpoint/functions/
H A Dpci-epf-test.c1 // SPDX-License-Identifier: GPL-2.0
18 #include <linux/pci-epc.h>
19 #include <linux/pci-epf.h>
93 epf_test->transfer_status = in pci_epf_test_dma_callback()
94 dmaengine_tx_status(epf_test->transfer_chan, in pci_epf_test_dma_callback()
95 epf_test->transfer_cookie, &state); in pci_epf_test_dma_callback()
96 if (epf_test->transfer_status == DMA_COMPLETE || in pci_epf_test_dma_callback()
97 epf_test->transfer_status == DMA_ERROR) in pci_epf_test_dma_callback()
98 complete(&epf_test->transfer_complete); in pci_epf_test_dma_callback()
102 * pci_epf_test_data_transfer() - Function that uses dmaengine API to transfer
[all …]
/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_ptp.c1 // SPDX-License-Identifier: GPL-2.0+
12 * The value is calculated as following: (1/1000000)/((2^-59)/6.037735849)
57 struct lan966x *lan966x = port->lan966x; in lan966x_ptp_add_trap()
61 vrule = vcap_get_rule(lan966x->vcap_ctrl, rule_id); in lan966x_ptp_add_trap()
63 u32 value, mask; in lan966x_ptp_add_trap() local
65 /* Just modify the ingress port mask and exit */ in lan966x_ptp_add_trap()
67 &value, &mask); in lan966x_ptp_add_trap()
68 mask &= ~BIT(port->chip_port); in lan966x_ptp_add_trap()
70 value, mask); in lan966x_ptp_add_trap()
76 vrule = vcap_alloc_rule(lan966x->vcap_ctrl, port->dev, in lan966x_ptp_add_trap()
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
16 compatible = "rockchip,rk3588-pipe-phy-grf", "syscon";
21 compatible = "rockchip,rk3588-i2s-tdm";
25 clock-names = "mclk_tx", "mclk_rx", "hclk";
26 assigned-clocks = <&cru CLK_I2S8_8CH_TX_SRC>;
27 assigned-clock-parents = <&cru PLL_AUPLL>;
29 dma-names = "tx";
30 power-domains = <&power RK3588_PD_VO0>;
[all …]
/openbmc/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_switch_map.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
49 /* VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000 */
52 /* VLAN-FID Table offset for EMAC */
154 /* Base Flow ID for sending mgmt and Tx TS to Host for Slice0 */
163 /* Express Preemptible Queue Mask */
173 * cut-through/S&F.
183 /* TAS gate mask for windows list0 */
186 /* TAS gate mask for windows list1 */
189 /* Memory to Enable/Disable Preemption on TX side */
[all …]
/openbmc/u-boot/drivers/mmc/
H A Dftsdc010_mci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Dante Su <dantesu@faraday-tech.com>
23 #include <dt-structs.h>
65 struct ftsdc010_chip *chip = mmc->priv; in ftsdc010_send_cmd()
66 struct ftsdc010_mmc __iomem *regs = chip->regs; in ftsdc010_send_cmd()
67 int ret = -ETIMEDOUT; in ftsdc010_send_cmd()
68 uint32_t ts, st; in ftsdc010_send_cmd() local
69 uint32_t cmd = FTSDC010_CMD_IDX(mmc_cmd->cmdidx); in ftsdc010_send_cmd()
70 uint32_t arg = mmc_cmd->cmdarg; in ftsdc010_send_cmd()
71 uint32_t flags = mmc_cmd->resp_type; in ftsdc010_send_cmd()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c1 // SPDX-License-Identifier: GPL-2.0
113 /* SMA1 and UFL1 cannot be set to TX at the same time */ in ice_ptp_set_sma_config_e810t()
116 return -EINVAL; in ice_ptp_set_sma_config_e810t()
121 return -EINVAL; in ice_ptp_set_sma_config_e810t()
140 /* U.FL 1 TX will always enable SMA 1 RX */ in ice_ptp_set_sma_config_e810t()
141 dev_info(ice_hw_to_dev(hw), "SMA1 RX + U.FL1 TX"); in ice_ptp_set_sma_config_e810t()
144 dev_info(ice_hw_to_dev(hw), "SMA1 RX + U.FL1 TX"); in ice_ptp_set_sma_config_e810t()
147 dev_info(ice_hw_to_dev(hw), "SMA1 TX"); in ice_ptp_set_sma_config_e810t()
167 dev_info(ice_hw_to_dev(hw), "SMA2 TX"); in ice_ptp_set_sma_config_e810t()
172 dev_info(ice_hw_to_dev(hw), "SMA2 TX + U.FL2 RX"); in ice_ptp_set_sma_config_e810t()
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