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12

/openbmc/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
17 compatible = "gpio-leds";
20 gpios = <&sgpio_out0 8 0 GPIO_ACTIVE_LOW>;
24 gpios = <&sgpio_out0 8 1 GPIO_ACTIVE_LOW>;
28 gpios = <&sgpio_out0 9 0 GPIO_ACTIVE_LOW>;
32 gpios = <&sgpio_out0 9 1 GPIO_ACTIVE_LOW>;
[all …]
H A Dsparx5_pcb135_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
17 compatible = "gpio-leds";
20 gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_LOW>;
21 default-state = "off";
25 gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_LOW>;
26 default-state = "off";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dsff,sfp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
11 - Russell King <linux@armlinux.org.uk>
16 - sff,sfp # for SFP modules
17 - sff,sff # for soldered down SFF modules
19 i2c-bus:
24 maximum-power-milliwatt:
29 allowable by a module in the slot, in milli-Watts. Presently, modules can
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
6 /dts-v1/;
7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi"
10 model = "Kontron KSwitch D10 MMT 6G-2GS";
11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
21 i2c-bus = <&i2c4>;
22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
24 maximum-power-milliwatt = <2500>;
[all …]
H A Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
25 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dmicrochip,spi-pic32.txt4 - compatible: Should be "microchip,pic32mzda-spi".
5 - reg: Address and length of register space for the device.
6 - interrupts: Should contain all three spi interrupts in sequence
7 of <fault-irq>, <receive-irq>, <transmit-irq>.
8 - interrupt-names: Should be "fault", "rx", "tx" in order.
9 - clocks: Phandle of the clock generating SPI clock on the bus.
10 - clock-names: Should be "mck0".
11 - cs-gpios: Specifies the gpio pins to be used for chipselects.
12 See: Documentation/devicetree/bindings/spi/spi-bus.txt
15 - dmas: Two or more DMA channel specifiers following the convention outlined
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-mcbin.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-8040.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
15 "marvell,armada-ap806-quad", "marvell,armada-ap806";
18 stdout-path = "serial0:115200n8";
34 v_3_3: regulator-3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "v_3_3";
37 regulator-min-microvolt = <3300000>;
[all …]
H A Darmada-3720-uDPU.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "armada-3720-uDPU.dtsi"
11 sfp_eth0: sfp-eth0 {
13 i2c-bus = <&i2c0>;
14 los-gpios = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
15 mod-def0-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
16 tx-disable-gpios = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
17 tx-fault-gpios = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
18 maximum-power-milliwatt = <3000>;
[all …]
H A Darmada-7040-mochabin.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-7040.dtsi"
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
34 sfp_eth0: sfp-eth0 {
36 i2c-bus = <&cp0_i2c1>;
37 los-gpios = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
38 mod-def0-gpios = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
[all …]
H A Darmada-3720-uDPU.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
30 led-power1 {
32 gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
35 led-power2 {
[all …]
H A Darmada-8040-puzzle-m801.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Device Tree file for IEI Puzzle-M801
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/leds/common.h>
15 model = "IEI-Puzzle-M801";
16 compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";
28 stdout-path = "serial0:115200n8";
37 v_3_3: regulator-3-3v {
38 compatible = "regulator-fixed";
[all …]
H A Dcn9131-db.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device tree for the CN9131-DB board.
8 #include "cn9130-db.dtsi"
12 "marvell,armada-ap807-quad", "marvell,armada-ap807";
22 compatible = "regulator-fixed";
23 pinctrl-names = "default";
24 pinctrl-0 = <&cp1_xhci0_vbus_pins>;
25 regulator-name = "cp1-xhci0-vbus";
26 regulator-min-microvolt = <5000000>;
27 regulator-max-microvolt = <5000000>;
[all …]
H A Dcn9132-db.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device tree for the CN9132-DB board.
8 #include "cn9131-db.dtsi"
12 "marvell,armada-ap807-quad", "marvell,armada-ap807";
21 compatible = "regulator-fixed";
22 regulator-name = "cp2-xhci0-vbus";
23 regulator-min-microvolt = <5000000>;
24 regulator-max-microvolt = <5000000>;
25 enable-active-high;
30 compatible = "usb-nop-xceiv";
[all …]
H A Dcn9130-crb.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/gpio/gpio.h>
12 stdout-path = "serial0:115200n8";
30 compatible = "regulator-gpio";
31 regulator-name = "ap0_mmc_vccq";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <3300000>;
34 gpios = <&expander0 5 GPIO_ACTIVE_HIGH>;
40 compatible = "regulator-fixed";
41 regulator-name = "cp0-xhci1-vbus";
[all …]
H A Dcn9130-db.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device tree for the CN9130-DB board.
10 #include <dt-bindings/gpio/gpio.h>
14 stdout-path = "serial0:115200n8";
34 compatible = "regulator-gpio";
35 regulator-name = "ap0_sd_vccq";
36 regulator-min-microvolt = <1800000>;
37 regulator-max-microvolt = <3300000>;
38 gpios = <&expander0 8 GPIO_ACTIVE_HIGH>;
43 compatible = "regulator-fixed";
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a-ten64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on fsl-ls1088a-rdb.dts
5 * Copyright 2017-2020 NXP
6 * Copyright 2019-2021 Traverse Technologies
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
28 stdout-path = "serial0:115200n8";
32 compatible = "gpio-keys";
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
[all …]
/openbmc/linux/drivers/staging/iio/resolver/
H A Dad2s1210.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2010 Analog Devices Inc.
79 static const struct ad2s1210_gpio gpios[] = { variable
92 struct gpio_desc *gpios[5]; member
99 u8 tx[2]; member
111 gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]); in ad2s1210_set_mode()
112 gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]); in ad2s1210_set_mode()
113 st->mode = mode; in ad2s1210_set_mode()
122 st->tx[0] = data; in ad2s1210_config_write()
123 ret = spi_write(st->sdev, st->tx, 1); in ad2s1210_config_write()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-3720-uDPU.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include "armada-37xx.dtsi"
15 #include "armada-3720-uDPU-u-boot.dtsi"
22 stdout-path = "serial0:115200n8";
38 #address-cells = <1>;
39 #size-cells = <0>;
40 ethphy0: ethernet-phy@0 {
43 ethphy1: ethernet-phy@1 {
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm958625hr.dts33 /dts-v1/;
35 #include "bcm-nsp.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = "serial0:115200n8";
51 gpio-restart {
52 compatible = "gpio-restart";
53 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
54 open-source;
60 i2c-bus = <&i2c0>;
61 mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-388-clearfog.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "armada-388.dtsi"
9 #include "armada-38x-solidrun-microsom.dtsi"
13 /* So that mvebu u-boot can update the MAC addresses */
20 stdout-path = "serial0:115200n8";
23 reg_3p3v: regulator-3p3v {
24 compatible = "regulator-fixed";
25 regulator-name = "3P3V";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
[all …]
H A Darmada-385-clearfog-gtr-s4.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 #include "armada-385-clearfog-gtr.dtsi"
10 tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
17 pinctrl-names = "default";
18 pinctrl-0 = <&cf_gtr_switch_reset_pins>;
19 reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
22 #address-cells = <1>;
23 #size-cells = <0>;
28 phy-handle = <&switch0phy0>;
34 phy-handle = <&switch0phy1>;
[all …]
H A Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
[all …]
/openbmc/linux/drivers/tty/serial/
H A Dpic32_uart.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
26 #include <asm/mach-pic32/pic32.h>
29 #define PIC32_DEV_NAME "pic32-uart"
43 /* struct pic32_sport - pic32 serial port descriptor
46 * @irq_fault: virtual fault interrupt number
47 * @irq_fault_name: irq fault name
50 * @irq_tx: virtual tx interrupt number
51 * @irq_tx_name: irq tx name
82 __raw_writel(val, sport->port.membase + reg); in pic32_uart_writel()
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sa8775p-pmics.dtsi"
16 compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
31 stdout-path = "serial0:115200n8";
36 regulators-0 {
37 compatible = "qcom,pmm8654au-rpmh-regulators";
38 qcom,pmic-id = "a";
[all …]

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