16694aee0SLars Povlsen// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 26694aee0SLars Povlsen/* 36694aee0SLars Povlsen * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. 46694aee0SLars Povlsen */ 56694aee0SLars Povlsen 66694aee0SLars Povlsen/dts-v1/; 76694aee0SLars Povlsen#include "sparx5_pcb_common.dtsi" 86694aee0SLars Povlsen 96694aee0SLars Povlsen/{ 1014bc6703SLars Povlsen gpio-restart { 1114bc6703SLars Povlsen compatible = "gpio-restart"; 1214bc6703SLars Povlsen gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 1314bc6703SLars Povlsen priority = <200>; 1414bc6703SLars Povlsen }; 157e1f91cbSLars Povlsen 167e1f91cbSLars Povlsen leds { 177e1f91cbSLars Povlsen compatible = "gpio-leds"; 187e1f91cbSLars Povlsen led@0 { 197e1f91cbSLars Povlsen label = "eth60:yellow"; 207e1f91cbSLars Povlsen gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_LOW>; 217e1f91cbSLars Povlsen default-state = "off"; 227e1f91cbSLars Povlsen }; 237e1f91cbSLars Povlsen led@1 { 247e1f91cbSLars Povlsen label = "eth60:green"; 257e1f91cbSLars Povlsen gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_LOW>; 267e1f91cbSLars Povlsen default-state = "off"; 277e1f91cbSLars Povlsen }; 287e1f91cbSLars Povlsen led@2 { 297e1f91cbSLars Povlsen label = "eth61:yellow"; 307e1f91cbSLars Povlsen gpios = <&sgpio_out1 29 0 GPIO_ACTIVE_LOW>; 317e1f91cbSLars Povlsen default-state = "off"; 327e1f91cbSLars Povlsen }; 337e1f91cbSLars Povlsen led@3 { 347e1f91cbSLars Povlsen label = "eth61:green"; 357e1f91cbSLars Povlsen gpios = <&sgpio_out1 29 1 GPIO_ACTIVE_LOW>; 367e1f91cbSLars Povlsen default-state = "off"; 377e1f91cbSLars Povlsen }; 387e1f91cbSLars Povlsen led@4 { 397e1f91cbSLars Povlsen label = "eth62:yellow"; 407e1f91cbSLars Povlsen gpios = <&sgpio_out1 30 0 GPIO_ACTIVE_LOW>; 417e1f91cbSLars Povlsen default-state = "off"; 427e1f91cbSLars Povlsen }; 437e1f91cbSLars Povlsen led@5 { 447e1f91cbSLars Povlsen label = "eth62:green"; 457e1f91cbSLars Povlsen gpios = <&sgpio_out1 30 1 GPIO_ACTIVE_LOW>; 467e1f91cbSLars Povlsen default-state = "off"; 477e1f91cbSLars Povlsen }; 487e1f91cbSLars Povlsen led@6 { 497e1f91cbSLars Povlsen label = "eth63:yellow"; 507e1f91cbSLars Povlsen gpios = <&sgpio_out1 31 0 GPIO_ACTIVE_LOW>; 517e1f91cbSLars Povlsen default-state = "off"; 527e1f91cbSLars Povlsen }; 537e1f91cbSLars Povlsen led@7 { 547e1f91cbSLars Povlsen label = "eth63:green"; 557e1f91cbSLars Povlsen gpios = <&sgpio_out1 31 1 GPIO_ACTIVE_LOW>; 567e1f91cbSLars Povlsen default-state = "off"; 577e1f91cbSLars Povlsen }; 587e1f91cbSLars Povlsen }; 596694aee0SLars Povlsen}; 60623910f4SLars Povlsen 61623910f4SLars Povlsen&gpio { 62*d5e64404SMichael Walle i2cmux_pins_i: i2cmux-pins { 63623910f4SLars Povlsen pins = "GPIO_35", "GPIO_36", 64623910f4SLars Povlsen "GPIO_50", "GPIO_51"; 65623910f4SLars Povlsen function = "twi_scl_m"; 66623910f4SLars Povlsen output-low; 67623910f4SLars Povlsen }; 68*d5e64404SMichael Walle i2cmux_s29: i2cmux-0-pins { 69623910f4SLars Povlsen pins = "GPIO_35"; 70623910f4SLars Povlsen function = "twi_scl_m"; 71623910f4SLars Povlsen output-high; 72623910f4SLars Povlsen }; 73*d5e64404SMichael Walle i2cmux_s30: i2cmux-1-pins { 74623910f4SLars Povlsen pins = "GPIO_36"; 75623910f4SLars Povlsen function = "twi_scl_m"; 76623910f4SLars Povlsen output-high; 77623910f4SLars Povlsen }; 78*d5e64404SMichael Walle i2cmux_s31: i2cmux-2-pins { 79623910f4SLars Povlsen pins = "GPIO_50"; 80623910f4SLars Povlsen function = "twi_scl_m"; 81623910f4SLars Povlsen output-high; 82623910f4SLars Povlsen }; 83*d5e64404SMichael Walle i2cmux_s32: i2cmux-3-pins { 84623910f4SLars Povlsen pins = "GPIO_51"; 85623910f4SLars Povlsen function = "twi_scl_m"; 86623910f4SLars Povlsen output-high; 87623910f4SLars Povlsen }; 88623910f4SLars Povlsen}; 89623910f4SLars Povlsen 90ba4d1c07SLars Povlsen&spi0 { 91ba4d1c07SLars Povlsen status = "okay"; 92402eb8ecSKrzysztof Kozlowski flash@0 { 93ba4d1c07SLars Povlsen compatible = "jedec,spi-nor"; 94ba4d1c07SLars Povlsen spi-max-frequency = <8000000>; 95d0f482bbSSteen Hegelund reg = <0>; 96ba4d1c07SLars Povlsen }; 97ba4d1c07SLars Povlsen}; 98ba4d1c07SLars Povlsen 99ba4d1c07SLars Povlsen&spi0 { 100ba4d1c07SLars Povlsen status = "okay"; 101ba4d1c07SLars Povlsen spi@0 { 102ba4d1c07SLars Povlsen compatible = "spi-mux"; 103ba4d1c07SLars Povlsen mux-controls = <&mux>; 104ba4d1c07SLars Povlsen #address-cells = <1>; 105ba4d1c07SLars Povlsen #size-cells = <0>; 106ba4d1c07SLars Povlsen reg = <0>; /* CS0 */ 107402eb8ecSKrzysztof Kozlowski flash@9 { 108ba4d1c07SLars Povlsen compatible = "jedec,spi-nor"; 109ba4d1c07SLars Povlsen spi-max-frequency = <8000000>; 110ba4d1c07SLars Povlsen reg = <0x9>; /* SPI */ 111ba4d1c07SLars Povlsen }; 112ba4d1c07SLars Povlsen }; 113ba4d1c07SLars Povlsen}; 114ba4d1c07SLars Povlsen 1157e1f91cbSLars Povlsen&sgpio1 { 1167e1f91cbSLars Povlsen status = "okay"; 1177e1f91cbSLars Povlsen microchip,sgpio-port-ranges = <24 31>; 1187e1f91cbSLars Povlsen gpio@0 { 1197e1f91cbSLars Povlsen ngpios = <64>; 1207e1f91cbSLars Povlsen }; 1217e1f91cbSLars Povlsen gpio@1 { 1227e1f91cbSLars Povlsen ngpios = <64>; 1237e1f91cbSLars Povlsen }; 1247e1f91cbSLars Povlsen}; 1257e1f91cbSLars Povlsen 126d0f482bbSSteen Hegelund&sgpio2 { 127d0f482bbSSteen Hegelund status = "okay"; 128d0f482bbSSteen Hegelund microchip,sgpio-port-ranges = <0 0>, <16 18>, <28 31>; 129d0f482bbSSteen Hegelund}; 130d0f482bbSSteen Hegelund 131623910f4SLars Povlsen&axi { 132623910f4SLars Povlsen i2c0_imux: i2c0-imux@0 { 133623910f4SLars Povlsen compatible = "i2c-mux-pinctrl"; 134623910f4SLars Povlsen #address-cells = <1>; 135623910f4SLars Povlsen #size-cells = <0>; 136623910f4SLars Povlsen i2c-parent = <&i2c0>; 137623910f4SLars Povlsen }; 138623910f4SLars Povlsen}; 139623910f4SLars Povlsen 140623910f4SLars Povlsen&i2c0_imux { 141623910f4SLars Povlsen pinctrl-names = 142d0f482bbSSteen Hegelund "i2c_sfp1", "i2c_sfp2", "i2c_sfp3", "i2c_sfp4", 143623910f4SLars Povlsen "idle"; 144623910f4SLars Povlsen pinctrl-0 = <&i2cmux_s29>; 145623910f4SLars Povlsen pinctrl-1 = <&i2cmux_s30>; 146623910f4SLars Povlsen pinctrl-2 = <&i2cmux_s31>; 147623910f4SLars Povlsen pinctrl-3 = <&i2cmux_s32>; 148623910f4SLars Povlsen pinctrl-4 = <&i2cmux_pins_i>; 149d0f482bbSSteen Hegelund i2c_sfp1: i2c_sfp1 { 150623910f4SLars Povlsen reg = <0x0>; 151623910f4SLars Povlsen #address-cells = <1>; 152623910f4SLars Povlsen #size-cells = <0>; 153623910f4SLars Povlsen }; 154d0f482bbSSteen Hegelund i2c_sfp2: i2c_sfp2 { 155623910f4SLars Povlsen reg = <0x1>; 156623910f4SLars Povlsen #address-cells = <1>; 157623910f4SLars Povlsen #size-cells = <0>; 158623910f4SLars Povlsen }; 159d0f482bbSSteen Hegelund i2c_sfp3: i2c_sfp3 { 160623910f4SLars Povlsen reg = <0x2>; 161623910f4SLars Povlsen #address-cells = <1>; 162623910f4SLars Povlsen #size-cells = <0>; 163623910f4SLars Povlsen }; 164d0f482bbSSteen Hegelund i2c_sfp4: i2c_sfp4 { 165623910f4SLars Povlsen reg = <0x3>; 166623910f4SLars Povlsen #address-cells = <1>; 167623910f4SLars Povlsen #size-cells = <0>; 168623910f4SLars Povlsen }; 169623910f4SLars Povlsen}; 170d0f482bbSSteen Hegelund 171d0f482bbSSteen Hegelund&axi { 172d0f482bbSSteen Hegelund sfp_eth60: sfp-eth60 { 173d0f482bbSSteen Hegelund compatible = "sff,sfp"; 174d0f482bbSSteen Hegelund i2c-bus = <&i2c_sfp1>; 175d0f482bbSSteen Hegelund tx-disable-gpios = <&sgpio_out2 28 0 GPIO_ACTIVE_LOW>; 176d0f482bbSSteen Hegelund rate-select0-gpios = <&sgpio_out2 28 1 GPIO_ACTIVE_HIGH>; 177d0f482bbSSteen Hegelund los-gpios = <&sgpio_in2 28 0 GPIO_ACTIVE_HIGH>; 178d0f482bbSSteen Hegelund mod-def0-gpios = <&sgpio_in2 28 1 GPIO_ACTIVE_LOW>; 179d0f482bbSSteen Hegelund tx-fault-gpios = <&sgpio_in2 28 2 GPIO_ACTIVE_HIGH>; 180d0f482bbSSteen Hegelund }; 181d0f482bbSSteen Hegelund sfp_eth61: sfp-eth61 { 182d0f482bbSSteen Hegelund compatible = "sff,sfp"; 183d0f482bbSSteen Hegelund i2c-bus = <&i2c_sfp2>; 184d0f482bbSSteen Hegelund tx-disable-gpios = <&sgpio_out2 29 0 GPIO_ACTIVE_LOW>; 185d0f482bbSSteen Hegelund rate-select0-gpios = <&sgpio_out2 29 1 GPIO_ACTIVE_HIGH>; 186d0f482bbSSteen Hegelund los-gpios = <&sgpio_in2 29 0 GPIO_ACTIVE_HIGH>; 187d0f482bbSSteen Hegelund mod-def0-gpios = <&sgpio_in2 29 1 GPIO_ACTIVE_LOW>; 188d0f482bbSSteen Hegelund tx-fault-gpios = <&sgpio_in2 29 2 GPIO_ACTIVE_HIGH>; 189d0f482bbSSteen Hegelund }; 190d0f482bbSSteen Hegelund sfp_eth62: sfp-eth62 { 191d0f482bbSSteen Hegelund compatible = "sff,sfp"; 192d0f482bbSSteen Hegelund i2c-bus = <&i2c_sfp3>; 193d0f482bbSSteen Hegelund tx-disable-gpios = <&sgpio_out2 30 0 GPIO_ACTIVE_LOW>; 194d0f482bbSSteen Hegelund rate-select0-gpios = <&sgpio_out2 30 1 GPIO_ACTIVE_HIGH>; 195d0f482bbSSteen Hegelund los-gpios = <&sgpio_in2 30 0 GPIO_ACTIVE_HIGH>; 196d0f482bbSSteen Hegelund mod-def0-gpios = <&sgpio_in2 30 1 GPIO_ACTIVE_LOW>; 197d0f482bbSSteen Hegelund tx-fault-gpios = <&sgpio_in2 30 2 GPIO_ACTIVE_HIGH>; 198d0f482bbSSteen Hegelund }; 199d0f482bbSSteen Hegelund sfp_eth63: sfp-eth63 { 200d0f482bbSSteen Hegelund compatible = "sff,sfp"; 201d0f482bbSSteen Hegelund i2c-bus = <&i2c_sfp4>; 202d0f482bbSSteen Hegelund tx-disable-gpios = <&sgpio_out2 31 0 GPIO_ACTIVE_LOW>; 203d0f482bbSSteen Hegelund rate-select0-gpios = <&sgpio_out2 31 1 GPIO_ACTIVE_HIGH>; 204d0f482bbSSteen Hegelund los-gpios = <&sgpio_in2 31 0 GPIO_ACTIVE_HIGH>; 205d0f482bbSSteen Hegelund mod-def0-gpios = <&sgpio_in2 31 1 GPIO_ACTIVE_LOW>; 206d0f482bbSSteen Hegelund tx-fault-gpios = <&sgpio_in2 31 2 GPIO_ACTIVE_HIGH>; 207d0f482bbSSteen Hegelund }; 208d0f482bbSSteen Hegelund}; 209d0f482bbSSteen Hegelund 210d0f482bbSSteen Hegelund&mdio0 { 211d1057299SKrzysztof Kozlowski status = "okay"; 212d0f482bbSSteen Hegelund phy0: ethernet-phy@0 { 213d0f482bbSSteen Hegelund reg = <0>; 214d0f482bbSSteen Hegelund }; 215d0f482bbSSteen Hegelund phy1: ethernet-phy@1 { 216d0f482bbSSteen Hegelund reg = <1>; 217d0f482bbSSteen Hegelund }; 218d0f482bbSSteen Hegelund phy2: ethernet-phy@2 { 219d0f482bbSSteen Hegelund reg = <2>; 220d0f482bbSSteen Hegelund }; 221d0f482bbSSteen Hegelund phy3: ethernet-phy@3 { 222d0f482bbSSteen Hegelund reg = <3>; 223d0f482bbSSteen Hegelund }; 224d0f482bbSSteen Hegelund phy4: ethernet-phy@4 { 225d0f482bbSSteen Hegelund reg = <4>; 226d0f482bbSSteen Hegelund }; 227d0f482bbSSteen Hegelund phy5: ethernet-phy@5 { 228d0f482bbSSteen Hegelund reg = <5>; 229d0f482bbSSteen Hegelund }; 230d0f482bbSSteen Hegelund phy6: ethernet-phy@6 { 231d0f482bbSSteen Hegelund reg = <6>; 232d0f482bbSSteen Hegelund }; 233d0f482bbSSteen Hegelund phy7: ethernet-phy@7 { 234d0f482bbSSteen Hegelund reg = <7>; 235d0f482bbSSteen Hegelund }; 236d0f482bbSSteen Hegelund phy8: ethernet-phy@8 { 237d0f482bbSSteen Hegelund reg = <8>; 238d0f482bbSSteen Hegelund }; 239d0f482bbSSteen Hegelund phy9: ethernet-phy@9 { 240d0f482bbSSteen Hegelund reg = <9>; 241d0f482bbSSteen Hegelund }; 242d0f482bbSSteen Hegelund phy10: ethernet-phy@10 { 243d0f482bbSSteen Hegelund reg = <10>; 244d0f482bbSSteen Hegelund }; 245d0f482bbSSteen Hegelund phy11: ethernet-phy@11 { 246d0f482bbSSteen Hegelund reg = <11>; 247d0f482bbSSteen Hegelund }; 248d0f482bbSSteen Hegelund phy12: ethernet-phy@12 { 249d0f482bbSSteen Hegelund reg = <12>; 250d0f482bbSSteen Hegelund }; 251d0f482bbSSteen Hegelund phy13: ethernet-phy@13 { 252d0f482bbSSteen Hegelund reg = <13>; 253d0f482bbSSteen Hegelund }; 254d0f482bbSSteen Hegelund phy14: ethernet-phy@14 { 255d0f482bbSSteen Hegelund reg = <14>; 256d0f482bbSSteen Hegelund }; 257d0f482bbSSteen Hegelund phy15: ethernet-phy@15 { 258d0f482bbSSteen Hegelund reg = <15>; 259d0f482bbSSteen Hegelund }; 260d0f482bbSSteen Hegelund phy16: ethernet-phy@16 { 261d0f482bbSSteen Hegelund reg = <16>; 262d0f482bbSSteen Hegelund }; 263d0f482bbSSteen Hegelund phy17: ethernet-phy@17 { 264d0f482bbSSteen Hegelund reg = <17>; 265d0f482bbSSteen Hegelund }; 266d0f482bbSSteen Hegelund phy18: ethernet-phy@18 { 267d0f482bbSSteen Hegelund reg = <18>; 268d0f482bbSSteen Hegelund }; 269d0f482bbSSteen Hegelund phy19: ethernet-phy@19 { 270d0f482bbSSteen Hegelund reg = <19>; 271d0f482bbSSteen Hegelund }; 272d0f482bbSSteen Hegelund phy20: ethernet-phy@20 { 273d0f482bbSSteen Hegelund reg = <20>; 274d0f482bbSSteen Hegelund }; 275d0f482bbSSteen Hegelund phy21: ethernet-phy@21 { 276d0f482bbSSteen Hegelund reg = <21>; 277d0f482bbSSteen Hegelund }; 278d0f482bbSSteen Hegelund phy22: ethernet-phy@22 { 279d0f482bbSSteen Hegelund reg = <22>; 280d0f482bbSSteen Hegelund }; 281d0f482bbSSteen Hegelund phy23: ethernet-phy@23 { 282d0f482bbSSteen Hegelund reg = <23>; 283d0f482bbSSteen Hegelund }; 284d0f482bbSSteen Hegelund}; 285d0f482bbSSteen Hegelund 286d0f482bbSSteen Hegelund&mdio1 { 287d1057299SKrzysztof Kozlowski status = "okay"; 288d0f482bbSSteen Hegelund phy24: ethernet-phy@24 { 289d0f482bbSSteen Hegelund reg = <0>; 290d0f482bbSSteen Hegelund }; 291d0f482bbSSteen Hegelund phy25: ethernet-phy@25 { 292d0f482bbSSteen Hegelund reg = <1>; 293d0f482bbSSteen Hegelund }; 294d0f482bbSSteen Hegelund phy26: ethernet-phy@26 { 295d0f482bbSSteen Hegelund reg = <2>; 296d0f482bbSSteen Hegelund }; 297d0f482bbSSteen Hegelund phy27: ethernet-phy@27 { 298d0f482bbSSteen Hegelund reg = <3>; 299d0f482bbSSteen Hegelund }; 300d0f482bbSSteen Hegelund phy28: ethernet-phy@28 { 301d0f482bbSSteen Hegelund reg = <4>; 302d0f482bbSSteen Hegelund }; 303d0f482bbSSteen Hegelund phy29: ethernet-phy@29 { 304d0f482bbSSteen Hegelund reg = <5>; 305d0f482bbSSteen Hegelund }; 306d0f482bbSSteen Hegelund phy30: ethernet-phy@30 { 307d0f482bbSSteen Hegelund reg = <6>; 308d0f482bbSSteen Hegelund }; 309d0f482bbSSteen Hegelund phy31: ethernet-phy@31 { 310d0f482bbSSteen Hegelund reg = <7>; 311d0f482bbSSteen Hegelund }; 312d0f482bbSSteen Hegelund phy32: ethernet-phy@32 { 313d0f482bbSSteen Hegelund reg = <8>; 314d0f482bbSSteen Hegelund }; 315d0f482bbSSteen Hegelund phy33: ethernet-phy@33 { 316d0f482bbSSteen Hegelund reg = <9>; 317d0f482bbSSteen Hegelund }; 318d0f482bbSSteen Hegelund phy34: ethernet-phy@34 { 319d0f482bbSSteen Hegelund reg = <10>; 320d0f482bbSSteen Hegelund }; 321d0f482bbSSteen Hegelund phy35: ethernet-phy@35 { 322d0f482bbSSteen Hegelund reg = <11>; 323d0f482bbSSteen Hegelund }; 324d0f482bbSSteen Hegelund phy36: ethernet-phy@36 { 325d0f482bbSSteen Hegelund reg = <12>; 326d0f482bbSSteen Hegelund }; 327d0f482bbSSteen Hegelund phy37: ethernet-phy@37 { 328d0f482bbSSteen Hegelund reg = <13>; 329d0f482bbSSteen Hegelund }; 330d0f482bbSSteen Hegelund phy38: ethernet-phy@38 { 331d0f482bbSSteen Hegelund reg = <14>; 332d0f482bbSSteen Hegelund }; 333d0f482bbSSteen Hegelund phy39: ethernet-phy@39 { 334d0f482bbSSteen Hegelund reg = <15>; 335d0f482bbSSteen Hegelund }; 336d0f482bbSSteen Hegelund phy40: ethernet-phy@40 { 337d0f482bbSSteen Hegelund reg = <16>; 338d0f482bbSSteen Hegelund }; 339d0f482bbSSteen Hegelund phy41: ethernet-phy@41 { 340d0f482bbSSteen Hegelund reg = <17>; 341d0f482bbSSteen Hegelund }; 342d0f482bbSSteen Hegelund phy42: ethernet-phy@42 { 343d0f482bbSSteen Hegelund reg = <18>; 344d0f482bbSSteen Hegelund }; 345d0f482bbSSteen Hegelund phy43: ethernet-phy@43 { 346d0f482bbSSteen Hegelund reg = <19>; 347d0f482bbSSteen Hegelund }; 348d0f482bbSSteen Hegelund phy44: ethernet-phy@44 { 349d0f482bbSSteen Hegelund reg = <20>; 350d0f482bbSSteen Hegelund }; 351d0f482bbSSteen Hegelund phy45: ethernet-phy@45 { 352d0f482bbSSteen Hegelund reg = <21>; 353d0f482bbSSteen Hegelund }; 354d0f482bbSSteen Hegelund phy46: ethernet-phy@46 { 355d0f482bbSSteen Hegelund reg = <22>; 356d0f482bbSSteen Hegelund }; 357d0f482bbSSteen Hegelund phy47: ethernet-phy@47 { 358d0f482bbSSteen Hegelund reg = <23>; 359d0f482bbSSteen Hegelund }; 360d0f482bbSSteen Hegelund}; 361d0f482bbSSteen Hegelund 362d0f482bbSSteen Hegelund&mdio3 { 363d1057299SKrzysztof Kozlowski status = "okay"; 364d0f482bbSSteen Hegelund phy64: ethernet-phy@64 { 365d0f482bbSSteen Hegelund reg = <28>; 366d0f482bbSSteen Hegelund }; 367d0f482bbSSteen Hegelund}; 368d0f482bbSSteen Hegelund 369d0f482bbSSteen Hegelund&switch { 370d0f482bbSSteen Hegelund ethernet-ports { 371d0f482bbSSteen Hegelund #address-cells = <1>; 372d0f482bbSSteen Hegelund #size-cells = <0>; 373d0f482bbSSteen Hegelund 374d0f482bbSSteen Hegelund port0: port@0 { 375d0f482bbSSteen Hegelund reg = <0>; 376d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 377d0f482bbSSteen Hegelund phys = <&serdes 13>; 378d0f482bbSSteen Hegelund phy-handle = <&phy0>; 379d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 380d0f482bbSSteen Hegelund }; 381d0f482bbSSteen Hegelund port1: port@1 { 382d0f482bbSSteen Hegelund reg = <1>; 383d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 384d0f482bbSSteen Hegelund phys = <&serdes 13>; 385d0f482bbSSteen Hegelund phy-handle = <&phy1>; 386d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 387d0f482bbSSteen Hegelund }; 388d0f482bbSSteen Hegelund port2: port@2 { 389d0f482bbSSteen Hegelund reg = <2>; 390d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 391d0f482bbSSteen Hegelund phys = <&serdes 13>; 392d0f482bbSSteen Hegelund phy-handle = <&phy2>; 393d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 394d0f482bbSSteen Hegelund }; 395d0f482bbSSteen Hegelund port3: port@3 { 396d0f482bbSSteen Hegelund reg = <3>; 397d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 398d0f482bbSSteen Hegelund phys = <&serdes 13>; 399d0f482bbSSteen Hegelund phy-handle = <&phy3>; 400d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 401d0f482bbSSteen Hegelund }; 402d0f482bbSSteen Hegelund port4: port@4 { 403d0f482bbSSteen Hegelund reg = <4>; 404d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 405d0f482bbSSteen Hegelund phys = <&serdes 14>; 406d0f482bbSSteen Hegelund phy-handle = <&phy4>; 407d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 408d0f482bbSSteen Hegelund }; 409d0f482bbSSteen Hegelund port5: port@5 { 410d0f482bbSSteen Hegelund reg = <5>; 411d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 412d0f482bbSSteen Hegelund phys = <&serdes 14>; 413d0f482bbSSteen Hegelund phy-handle = <&phy5>; 414d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 415d0f482bbSSteen Hegelund }; 416d0f482bbSSteen Hegelund port6: port@6 { 417d0f482bbSSteen Hegelund reg = <6>; 418d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 419d0f482bbSSteen Hegelund phys = <&serdes 14>; 420d0f482bbSSteen Hegelund phy-handle = <&phy6>; 421d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 422d0f482bbSSteen Hegelund }; 423d0f482bbSSteen Hegelund port7: port@7 { 424d0f482bbSSteen Hegelund reg = <7>; 425d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 426d0f482bbSSteen Hegelund phys = <&serdes 14>; 427d0f482bbSSteen Hegelund phy-handle = <&phy7>; 428d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 429d0f482bbSSteen Hegelund }; 430d0f482bbSSteen Hegelund port8: port@8 { 431d0f482bbSSteen Hegelund reg = <8>; 432d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 433d0f482bbSSteen Hegelund phys = <&serdes 15>; 434d0f482bbSSteen Hegelund phy-handle = <&phy8>; 435d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 436d0f482bbSSteen Hegelund }; 437d0f482bbSSteen Hegelund port9: port@9 { 438d0f482bbSSteen Hegelund reg = <9>; 439d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 440d0f482bbSSteen Hegelund phys = <&serdes 15>; 441d0f482bbSSteen Hegelund phy-handle = <&phy9>; 442d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 443d0f482bbSSteen Hegelund }; 444d0f482bbSSteen Hegelund port10: port@10 { 445d0f482bbSSteen Hegelund reg = <10>; 446d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 447d0f482bbSSteen Hegelund phys = <&serdes 15>; 448d0f482bbSSteen Hegelund phy-handle = <&phy10>; 449d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 450d0f482bbSSteen Hegelund }; 451d0f482bbSSteen Hegelund port11: port@11 { 452d0f482bbSSteen Hegelund reg = <11>; 453d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 454d0f482bbSSteen Hegelund phys = <&serdes 15>; 455d0f482bbSSteen Hegelund phy-handle = <&phy11>; 456d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 457d0f482bbSSteen Hegelund }; 458d0f482bbSSteen Hegelund port12: port@12 { 459d0f482bbSSteen Hegelund reg = <12>; 460d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 461d0f482bbSSteen Hegelund phys = <&serdes 16>; 462d0f482bbSSteen Hegelund phy-handle = <&phy12>; 463d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 464d0f482bbSSteen Hegelund }; 465d0f482bbSSteen Hegelund port13: port@13 { 466d0f482bbSSteen Hegelund reg = <13>; 467d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 468d0f482bbSSteen Hegelund phys = <&serdes 16>; 469d0f482bbSSteen Hegelund phy-handle = <&phy13>; 470d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 471d0f482bbSSteen Hegelund }; 472d0f482bbSSteen Hegelund port14: port@14 { 473d0f482bbSSteen Hegelund reg = <14>; 474d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 475d0f482bbSSteen Hegelund phys = <&serdes 16>; 476d0f482bbSSteen Hegelund phy-handle = <&phy14>; 477d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 478d0f482bbSSteen Hegelund }; 479d0f482bbSSteen Hegelund port15: port@15 { 480d0f482bbSSteen Hegelund reg = <15>; 481d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 482d0f482bbSSteen Hegelund phys = <&serdes 16>; 483d0f482bbSSteen Hegelund phy-handle = <&phy15>; 484d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 485d0f482bbSSteen Hegelund }; 486d0f482bbSSteen Hegelund port16: port@16 { 487d0f482bbSSteen Hegelund reg = <16>; 488d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 489d0f482bbSSteen Hegelund phys = <&serdes 17>; 490d0f482bbSSteen Hegelund phy-handle = <&phy16>; 491d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 492d0f482bbSSteen Hegelund }; 493d0f482bbSSteen Hegelund port17: port@17 { 494d0f482bbSSteen Hegelund reg = <17>; 495d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 496d0f482bbSSteen Hegelund phys = <&serdes 17>; 497d0f482bbSSteen Hegelund phy-handle = <&phy17>; 498d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 499d0f482bbSSteen Hegelund }; 500d0f482bbSSteen Hegelund port18: port@18 { 501d0f482bbSSteen Hegelund reg = <18>; 502d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 503d0f482bbSSteen Hegelund phys = <&serdes 17>; 504d0f482bbSSteen Hegelund phy-handle = <&phy18>; 505d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 506d0f482bbSSteen Hegelund }; 507d0f482bbSSteen Hegelund port19: port@19 { 508d0f482bbSSteen Hegelund reg = <19>; 509d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 510d0f482bbSSteen Hegelund phys = <&serdes 17>; 511d0f482bbSSteen Hegelund phy-handle = <&phy19>; 512d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 513d0f482bbSSteen Hegelund }; 514d0f482bbSSteen Hegelund port20: port@20 { 515d0f482bbSSteen Hegelund reg = <20>; 516d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 517d0f482bbSSteen Hegelund phys = <&serdes 18>; 518d0f482bbSSteen Hegelund phy-handle = <&phy20>; 519d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 520d0f482bbSSteen Hegelund }; 521d0f482bbSSteen Hegelund port21: port@21 { 522d0f482bbSSteen Hegelund reg = <21>; 523d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 524d0f482bbSSteen Hegelund phys = <&serdes 18>; 525d0f482bbSSteen Hegelund phy-handle = <&phy21>; 526d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 527d0f482bbSSteen Hegelund }; 528d0f482bbSSteen Hegelund port22: port@22 { 529d0f482bbSSteen Hegelund reg = <22>; 530d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 531d0f482bbSSteen Hegelund phys = <&serdes 18>; 532d0f482bbSSteen Hegelund phy-handle = <&phy22>; 533d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 534d0f482bbSSteen Hegelund }; 535d0f482bbSSteen Hegelund port23: port@23 { 536d0f482bbSSteen Hegelund reg = <23>; 537d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 538d0f482bbSSteen Hegelund phys = <&serdes 18>; 539d0f482bbSSteen Hegelund phy-handle = <&phy23>; 540d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 541d0f482bbSSteen Hegelund }; 542d0f482bbSSteen Hegelund port24: port@24 { 543d0f482bbSSteen Hegelund reg = <24>; 544d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 545d0f482bbSSteen Hegelund phys = <&serdes 19>; 546d0f482bbSSteen Hegelund phy-handle = <&phy24>; 547d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 548d0f482bbSSteen Hegelund }; 549d0f482bbSSteen Hegelund port25: port@25 { 550d0f482bbSSteen Hegelund reg = <25>; 551d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 552d0f482bbSSteen Hegelund phys = <&serdes 19>; 553d0f482bbSSteen Hegelund phy-handle = <&phy25>; 554d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 555d0f482bbSSteen Hegelund }; 556d0f482bbSSteen Hegelund port26: port@26 { 557d0f482bbSSteen Hegelund reg = <26>; 558d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 559d0f482bbSSteen Hegelund phys = <&serdes 19>; 560d0f482bbSSteen Hegelund phy-handle = <&phy26>; 561d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 562d0f482bbSSteen Hegelund }; 563d0f482bbSSteen Hegelund port27: port@27 { 564d0f482bbSSteen Hegelund reg = <27>; 565d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 566d0f482bbSSteen Hegelund phys = <&serdes 19>; 567d0f482bbSSteen Hegelund phy-handle = <&phy27>; 568d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 569d0f482bbSSteen Hegelund }; 570d0f482bbSSteen Hegelund port28: port@28 { 571d0f482bbSSteen Hegelund reg = <28>; 572d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 573d0f482bbSSteen Hegelund phys = <&serdes 20>; 574d0f482bbSSteen Hegelund phy-handle = <&phy28>; 575d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 576d0f482bbSSteen Hegelund }; 577d0f482bbSSteen Hegelund port29: port@29 { 578d0f482bbSSteen Hegelund reg = <29>; 579d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 580d0f482bbSSteen Hegelund phys = <&serdes 20>; 581d0f482bbSSteen Hegelund phy-handle = <&phy29>; 582d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 583d0f482bbSSteen Hegelund }; 584d0f482bbSSteen Hegelund port30: port@30 { 585d0f482bbSSteen Hegelund reg = <30>; 586d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 587d0f482bbSSteen Hegelund phys = <&serdes 20>; 588d0f482bbSSteen Hegelund phy-handle = <&phy30>; 589d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 590d0f482bbSSteen Hegelund }; 591d0f482bbSSteen Hegelund port31: port@31 { 592d0f482bbSSteen Hegelund reg = <31>; 593d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 594d0f482bbSSteen Hegelund phys = <&serdes 20>; 595d0f482bbSSteen Hegelund phy-handle = <&phy31>; 596d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 597d0f482bbSSteen Hegelund }; 598d0f482bbSSteen Hegelund port32: port@32 { 599d0f482bbSSteen Hegelund reg = <32>; 600d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 601d0f482bbSSteen Hegelund phys = <&serdes 21>; 602d0f482bbSSteen Hegelund phy-handle = <&phy32>; 603d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 604d0f482bbSSteen Hegelund }; 605d0f482bbSSteen Hegelund port33: port@33 { 606d0f482bbSSteen Hegelund reg = <33>; 607d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 608d0f482bbSSteen Hegelund phys = <&serdes 21>; 609d0f482bbSSteen Hegelund phy-handle = <&phy33>; 610d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 611d0f482bbSSteen Hegelund }; 612d0f482bbSSteen Hegelund port34: port@34 { 613d0f482bbSSteen Hegelund reg = <34>; 614d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 615d0f482bbSSteen Hegelund phys = <&serdes 21>; 616d0f482bbSSteen Hegelund phy-handle = <&phy34>; 617d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 618d0f482bbSSteen Hegelund }; 619d0f482bbSSteen Hegelund port35: port@35 { 620d0f482bbSSteen Hegelund reg = <35>; 621d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 622d0f482bbSSteen Hegelund phys = <&serdes 21>; 623d0f482bbSSteen Hegelund phy-handle = <&phy35>; 624d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 625d0f482bbSSteen Hegelund }; 626d0f482bbSSteen Hegelund port36: port@36 { 627d0f482bbSSteen Hegelund reg = <36>; 628d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 629d0f482bbSSteen Hegelund phys = <&serdes 22>; 630d0f482bbSSteen Hegelund phy-handle = <&phy36>; 631d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 632d0f482bbSSteen Hegelund }; 633d0f482bbSSteen Hegelund port37: port@37 { 634d0f482bbSSteen Hegelund reg = <37>; 635d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 636d0f482bbSSteen Hegelund phys = <&serdes 22>; 637d0f482bbSSteen Hegelund phy-handle = <&phy37>; 638d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 639d0f482bbSSteen Hegelund }; 640d0f482bbSSteen Hegelund port38: port@38 { 641d0f482bbSSteen Hegelund reg = <38>; 642d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 643d0f482bbSSteen Hegelund phys = <&serdes 22>; 644d0f482bbSSteen Hegelund phy-handle = <&phy38>; 645d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 646d0f482bbSSteen Hegelund }; 647d0f482bbSSteen Hegelund port39: port@39 { 648d0f482bbSSteen Hegelund reg = <39>; 649d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 650d0f482bbSSteen Hegelund phys = <&serdes 22>; 651d0f482bbSSteen Hegelund phy-handle = <&phy39>; 652d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 653d0f482bbSSteen Hegelund }; 654d0f482bbSSteen Hegelund port40: port@40 { 655d0f482bbSSteen Hegelund reg = <40>; 656d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 657d0f482bbSSteen Hegelund phys = <&serdes 23>; 658d0f482bbSSteen Hegelund phy-handle = <&phy40>; 659d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 660d0f482bbSSteen Hegelund }; 661d0f482bbSSteen Hegelund port41: port@41 { 662d0f482bbSSteen Hegelund reg = <41>; 663d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 664d0f482bbSSteen Hegelund phys = <&serdes 23>; 665d0f482bbSSteen Hegelund phy-handle = <&phy41>; 666d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 667d0f482bbSSteen Hegelund }; 668d0f482bbSSteen Hegelund port42: port@42 { 669d0f482bbSSteen Hegelund reg = <42>; 670d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 671d0f482bbSSteen Hegelund phys = <&serdes 23>; 672d0f482bbSSteen Hegelund phy-handle = <&phy42>; 673d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 674d0f482bbSSteen Hegelund }; 675d0f482bbSSteen Hegelund port43: port@43 { 676d0f482bbSSteen Hegelund reg = <43>; 677d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 678d0f482bbSSteen Hegelund phys = <&serdes 23>; 679d0f482bbSSteen Hegelund phy-handle = <&phy43>; 680d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 681d0f482bbSSteen Hegelund }; 682d0f482bbSSteen Hegelund port44: port@44 { 683d0f482bbSSteen Hegelund reg = <44>; 684d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 685d0f482bbSSteen Hegelund phys = <&serdes 24>; 686d0f482bbSSteen Hegelund phy-handle = <&phy44>; 687d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 688d0f482bbSSteen Hegelund }; 689d0f482bbSSteen Hegelund port45: port@45 { 690d0f482bbSSteen Hegelund reg = <45>; 691d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 692d0f482bbSSteen Hegelund phys = <&serdes 24>; 693d0f482bbSSteen Hegelund phy-handle = <&phy45>; 694d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 695d0f482bbSSteen Hegelund }; 696d0f482bbSSteen Hegelund port46: port@46 { 697d0f482bbSSteen Hegelund reg = <46>; 698d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 699d0f482bbSSteen Hegelund phys = <&serdes 24>; 700d0f482bbSSteen Hegelund phy-handle = <&phy46>; 701d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 702d0f482bbSSteen Hegelund }; 703d0f482bbSSteen Hegelund port47: port@47 { 704d0f482bbSSteen Hegelund reg = <47>; 705d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 706d0f482bbSSteen Hegelund phys = <&serdes 24>; 707d0f482bbSSteen Hegelund phy-handle = <&phy47>; 708d0f482bbSSteen Hegelund phy-mode = "qsgmii"; 709d0f482bbSSteen Hegelund }; 710d0f482bbSSteen Hegelund /* Then the 25G interfaces */ 711d0f482bbSSteen Hegelund port60: port@60 { 712d0f482bbSSteen Hegelund reg = <60>; 713d0f482bbSSteen Hegelund microchip,bandwidth = <25000>; 714d0f482bbSSteen Hegelund phys = <&serdes 29>; 715d0f482bbSSteen Hegelund phy-mode = "10gbase-r"; 716d0f482bbSSteen Hegelund sfp = <&sfp_eth60>; 717d0f482bbSSteen Hegelund managed = "in-band-status"; 718d0f482bbSSteen Hegelund }; 719d0f482bbSSteen Hegelund port61: port@61 { 720d0f482bbSSteen Hegelund reg = <61>; 721d0f482bbSSteen Hegelund microchip,bandwidth = <25000>; 722d0f482bbSSteen Hegelund phys = <&serdes 30>; 723d0f482bbSSteen Hegelund phy-mode = "10gbase-r"; 724d0f482bbSSteen Hegelund sfp = <&sfp_eth61>; 725d0f482bbSSteen Hegelund managed = "in-band-status"; 726d0f482bbSSteen Hegelund }; 727d0f482bbSSteen Hegelund port62: port@62 { 728d0f482bbSSteen Hegelund reg = <62>; 729d0f482bbSSteen Hegelund microchip,bandwidth = <25000>; 730d0f482bbSSteen Hegelund phys = <&serdes 31>; 731d0f482bbSSteen Hegelund phy-mode = "10gbase-r"; 732d0f482bbSSteen Hegelund sfp = <&sfp_eth62>; 733d0f482bbSSteen Hegelund managed = "in-band-status"; 734d0f482bbSSteen Hegelund }; 735d0f482bbSSteen Hegelund port63: port@63 { 736d0f482bbSSteen Hegelund reg = <63>; 737d0f482bbSSteen Hegelund microchip,bandwidth = <25000>; 738d0f482bbSSteen Hegelund phys = <&serdes 32>; 739d0f482bbSSteen Hegelund phy-mode = "10gbase-r"; 740d0f482bbSSteen Hegelund sfp = <&sfp_eth63>; 741d0f482bbSSteen Hegelund managed = "in-band-status"; 742d0f482bbSSteen Hegelund }; 743d0f482bbSSteen Hegelund /* Finally the Management interface */ 744d0f482bbSSteen Hegelund port64: port@64 { 745d0f482bbSSteen Hegelund reg = <64>; 746d0f482bbSSteen Hegelund microchip,bandwidth = <1000>; 747d0f482bbSSteen Hegelund phys = <&serdes 0>; 748d0f482bbSSteen Hegelund phy-handle = <&phy64>; 749d0f482bbSSteen Hegelund phy-mode = "sgmii"; 750d0f482bbSSteen Hegelund }; 751d0f482bbSSteen Hegelund }; 752d0f482bbSSteen Hegelund}; 753