1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
4 *
5 * Copyright (c) 2010-2010 Analog Devices Inc.
6 */
7 #include <linux/types.h>
8 #include <linux/mutex.h>
9 #include <linux/device.h>
10 #include <linux/of.h>
11 #include <linux/spi/spi.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/delay.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/module.h>
17
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
20
21 #define DRV_NAME "ad2s1210"
22
23 #define AD2S1210_DEF_CONTROL 0x7E
24
25 #define AD2S1210_MSB_IS_HIGH 0x80
26 #define AD2S1210_MSB_IS_LOW 0x7F
27 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
28 #define AD2S1210_ENABLE_HYSTERESIS 0x10
29 #define AD2S1210_SET_ENRES1 0x08
30 #define AD2S1210_SET_ENRES0 0x04
31 #define AD2S1210_SET_RES1 0x02
32 #define AD2S1210_SET_RES0 0x01
33
34 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
35
36 #define AD2S1210_REG_POSITION 0x80
37 #define AD2S1210_REG_VELOCITY 0x82
38 #define AD2S1210_REG_LOS_THRD 0x88
39 #define AD2S1210_REG_DOS_OVR_THRD 0x89
40 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
41 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
42 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
43 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
44 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
45 #define AD2S1210_REG_EXCIT_FREQ 0x91
46 #define AD2S1210_REG_CONTROL 0x92
47 #define AD2S1210_REG_SOFT_RESET 0xF0
48 #define AD2S1210_REG_FAULT 0xFF
49
50 #define AD2S1210_MIN_CLKIN 6144000
51 #define AD2S1210_MAX_CLKIN 10240000
52 #define AD2S1210_MIN_EXCIT 2000
53 #define AD2S1210_MAX_EXCIT 20000
54 #define AD2S1210_MIN_FCW 0x4
55 #define AD2S1210_MAX_FCW 0x50
56
57 #define AD2S1210_DEF_EXCIT 10000
58
59 enum ad2s1210_mode {
60 MOD_POS = 0,
61 MOD_VEL,
62 MOD_CONFIG,
63 MOD_RESERVED,
64 };
65
66 enum ad2s1210_gpios {
67 AD2S1210_SAMPLE,
68 AD2S1210_A0,
69 AD2S1210_A1,
70 AD2S1210_RES0,
71 AD2S1210_RES1,
72 };
73
74 struct ad2s1210_gpio {
75 const char *name;
76 unsigned long flags;
77 };
78
79 static const struct ad2s1210_gpio gpios[] = {
80 [AD2S1210_SAMPLE] = { .name = "adi,sample", .flags = GPIOD_OUT_LOW },
81 [AD2S1210_A0] = { .name = "adi,a0", .flags = GPIOD_OUT_LOW },
82 [AD2S1210_A1] = { .name = "adi,a1", .flags = GPIOD_OUT_LOW },
83 [AD2S1210_RES0] = { .name = "adi,res0", .flags = GPIOD_OUT_LOW },
84 [AD2S1210_RES1] = { .name = "adi,res1", .flags = GPIOD_OUT_LOW },
85 };
86
87 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
88
89 struct ad2s1210_state {
90 struct mutex lock;
91 struct spi_device *sdev;
92 struct gpio_desc *gpios[5];
93 unsigned int fclkin;
94 unsigned int fexcit;
95 bool hysteresis;
96 u8 resolution;
97 enum ad2s1210_mode mode;
98 u8 rx[2] __aligned(IIO_DMA_MINALIGN);
99 u8 tx[2];
100 };
101
102 static const int ad2s1210_mode_vals[4][2] = {
103 [MOD_POS] = { 0, 0 },
104 [MOD_VEL] = { 0, 1 },
105 [MOD_CONFIG] = { 1, 1 },
106 };
107
ad2s1210_set_mode(enum ad2s1210_mode mode,struct ad2s1210_state * st)108 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
109 struct ad2s1210_state *st)
110 {
111 gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]);
112 gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]);
113 st->mode = mode;
114 }
115
116 /* write 1 bytes (address or data) to the chip */
ad2s1210_config_write(struct ad2s1210_state * st,u8 data)117 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
118 {
119 int ret;
120
121 ad2s1210_set_mode(MOD_CONFIG, st);
122 st->tx[0] = data;
123 ret = spi_write(st->sdev, st->tx, 1);
124 if (ret < 0)
125 return ret;
126
127 return 0;
128 }
129
130 /* read value from one of the registers */
ad2s1210_config_read(struct ad2s1210_state * st,unsigned char address)131 static int ad2s1210_config_read(struct ad2s1210_state *st,
132 unsigned char address)
133 {
134 struct spi_transfer xfers[] = {
135 {
136 .len = 1,
137 .rx_buf = &st->rx[0],
138 .tx_buf = &st->tx[0],
139 .cs_change = 1,
140 }, {
141 .len = 1,
142 .rx_buf = &st->rx[1],
143 .tx_buf = &st->tx[1],
144 },
145 };
146 int ret = 0;
147
148 ad2s1210_set_mode(MOD_CONFIG, st);
149 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
150 st->tx[1] = AD2S1210_REG_FAULT;
151 ret = spi_sync_transfer(st->sdev, xfers, 2);
152 if (ret < 0)
153 return ret;
154
155 return st->rx[1];
156 }
157
158 static inline
ad2s1210_update_frequency_control_word(struct ad2s1210_state * st)159 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
160 {
161 int ret;
162 unsigned char fcw;
163
164 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
165 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
166 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
167 return -ERANGE;
168 }
169
170 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
171 if (ret < 0)
172 return ret;
173
174 return ad2s1210_config_write(st, fcw);
175 }
176
177 static const int ad2s1210_res_pins[4][2] = {
178 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
179 };
180
ad2s1210_set_resolution_pin(struct ad2s1210_state * st)181 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
182 {
183 gpiod_set_value(st->gpios[AD2S1210_RES0],
184 ad2s1210_res_pins[(st->resolution - 10) / 2][0]);
185 gpiod_set_value(st->gpios[AD2S1210_RES1],
186 ad2s1210_res_pins[(st->resolution - 10) / 2][1]);
187 }
188
ad2s1210_soft_reset(struct ad2s1210_state * st)189 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
190 {
191 int ret;
192
193 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
194 if (ret < 0)
195 return ret;
196
197 return ad2s1210_config_write(st, 0x0);
198 }
199
ad2s1210_show_fclkin(struct device * dev,struct device_attribute * attr,char * buf)200 static ssize_t ad2s1210_show_fclkin(struct device *dev,
201 struct device_attribute *attr,
202 char *buf)
203 {
204 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
205
206 return sprintf(buf, "%u\n", st->fclkin);
207 }
208
ad2s1210_store_fclkin(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)209 static ssize_t ad2s1210_store_fclkin(struct device *dev,
210 struct device_attribute *attr,
211 const char *buf,
212 size_t len)
213 {
214 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
215 unsigned int fclkin;
216 int ret;
217
218 ret = kstrtouint(buf, 10, &fclkin);
219 if (ret)
220 return ret;
221 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
222 dev_err(dev, "ad2s1210: fclkin out of range\n");
223 return -EINVAL;
224 }
225
226 mutex_lock(&st->lock);
227 st->fclkin = fclkin;
228
229 ret = ad2s1210_update_frequency_control_word(st);
230 if (ret < 0)
231 goto error_ret;
232 ret = ad2s1210_soft_reset(st);
233 error_ret:
234 mutex_unlock(&st->lock);
235
236 return ret < 0 ? ret : len;
237 }
238
ad2s1210_show_fexcit(struct device * dev,struct device_attribute * attr,char * buf)239 static ssize_t ad2s1210_show_fexcit(struct device *dev,
240 struct device_attribute *attr,
241 char *buf)
242 {
243 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
244
245 return sprintf(buf, "%u\n", st->fexcit);
246 }
247
ad2s1210_store_fexcit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)248 static ssize_t ad2s1210_store_fexcit(struct device *dev,
249 struct device_attribute *attr,
250 const char *buf, size_t len)
251 {
252 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
253 unsigned int fexcit;
254 int ret;
255
256 ret = kstrtouint(buf, 10, &fexcit);
257 if (ret < 0)
258 return ret;
259 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
260 dev_err(dev,
261 "ad2s1210: excitation frequency out of range\n");
262 return -EINVAL;
263 }
264 mutex_lock(&st->lock);
265 st->fexcit = fexcit;
266 ret = ad2s1210_update_frequency_control_word(st);
267 if (ret < 0)
268 goto error_ret;
269 ret = ad2s1210_soft_reset(st);
270 error_ret:
271 mutex_unlock(&st->lock);
272
273 return ret < 0 ? ret : len;
274 }
275
ad2s1210_show_control(struct device * dev,struct device_attribute * attr,char * buf)276 static ssize_t ad2s1210_show_control(struct device *dev,
277 struct device_attribute *attr,
278 char *buf)
279 {
280 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
281 int ret;
282
283 mutex_lock(&st->lock);
284 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
285 mutex_unlock(&st->lock);
286 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
287 }
288
ad2s1210_store_control(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)289 static ssize_t ad2s1210_store_control(struct device *dev,
290 struct device_attribute *attr,
291 const char *buf, size_t len)
292 {
293 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
294 unsigned char udata;
295 unsigned char data;
296 int ret;
297
298 ret = kstrtou8(buf, 16, &udata);
299 if (ret)
300 return -EINVAL;
301
302 mutex_lock(&st->lock);
303 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
304 if (ret < 0)
305 goto error_ret;
306 data = udata & AD2S1210_MSB_IS_LOW;
307 ret = ad2s1210_config_write(st, data);
308 if (ret < 0)
309 goto error_ret;
310
311 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
312 if (ret < 0)
313 goto error_ret;
314 if (ret & AD2S1210_MSB_IS_HIGH) {
315 ret = -EIO;
316 dev_err(dev,
317 "ad2s1210: write control register fail\n");
318 goto error_ret;
319 }
320 st->resolution =
321 ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
322 ad2s1210_set_resolution_pin(st);
323 ret = len;
324 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
325
326 error_ret:
327 mutex_unlock(&st->lock);
328 return ret;
329 }
330
ad2s1210_show_resolution(struct device * dev,struct device_attribute * attr,char * buf)331 static ssize_t ad2s1210_show_resolution(struct device *dev,
332 struct device_attribute *attr,
333 char *buf)
334 {
335 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
336
337 return sprintf(buf, "%d\n", st->resolution);
338 }
339
ad2s1210_store_resolution(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)340 static ssize_t ad2s1210_store_resolution(struct device *dev,
341 struct device_attribute *attr,
342 const char *buf, size_t len)
343 {
344 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
345 unsigned char data;
346 unsigned char udata;
347 int ret;
348
349 ret = kstrtou8(buf, 10, &udata);
350 if (ret || udata < 10 || udata > 16) {
351 dev_err(dev, "ad2s1210: resolution out of range\n");
352 return -EINVAL;
353 }
354 mutex_lock(&st->lock);
355 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
356 if (ret < 0)
357 goto error_ret;
358 data = ret;
359 data &= ~AD2S1210_SET_RESOLUTION;
360 data |= (udata - 10) >> 1;
361 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
362 if (ret < 0)
363 goto error_ret;
364 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
365 if (ret < 0)
366 goto error_ret;
367 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
368 if (ret < 0)
369 goto error_ret;
370 data = ret;
371 if (data & AD2S1210_MSB_IS_HIGH) {
372 ret = -EIO;
373 dev_err(dev, "ad2s1210: setting resolution fail\n");
374 goto error_ret;
375 }
376 st->resolution =
377 ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
378 ad2s1210_set_resolution_pin(st);
379 ret = len;
380 error_ret:
381 mutex_unlock(&st->lock);
382 return ret;
383 }
384
385 /* read the fault register since last sample */
ad2s1210_show_fault(struct device * dev,struct device_attribute * attr,char * buf)386 static ssize_t ad2s1210_show_fault(struct device *dev,
387 struct device_attribute *attr, char *buf)
388 {
389 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
390 int ret;
391
392 mutex_lock(&st->lock);
393 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
394 mutex_unlock(&st->lock);
395
396 return ret ? ret : sprintf(buf, "0x%x\n", ret);
397 }
398
ad2s1210_clear_fault(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)399 static ssize_t ad2s1210_clear_fault(struct device *dev,
400 struct device_attribute *attr,
401 const char *buf,
402 size_t len)
403 {
404 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
405 int ret;
406
407 mutex_lock(&st->lock);
408 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
409 /* delay (2 * tck + 20) nano seconds */
410 udelay(1);
411 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
412 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
413 if (ret < 0)
414 goto error_ret;
415 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
416 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
417 error_ret:
418 mutex_unlock(&st->lock);
419
420 return ret < 0 ? ret : len;
421 }
422
ad2s1210_show_reg(struct device * dev,struct device_attribute * attr,char * buf)423 static ssize_t ad2s1210_show_reg(struct device *dev,
424 struct device_attribute *attr,
425 char *buf)
426 {
427 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
428 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
429 int ret;
430
431 mutex_lock(&st->lock);
432 ret = ad2s1210_config_read(st, iattr->address);
433 mutex_unlock(&st->lock);
434
435 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
436 }
437
ad2s1210_store_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)438 static ssize_t ad2s1210_store_reg(struct device *dev,
439 struct device_attribute *attr,
440 const char *buf, size_t len)
441 {
442 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
443 unsigned char data;
444 int ret;
445 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
446
447 ret = kstrtou8(buf, 10, &data);
448 if (ret)
449 return -EINVAL;
450 mutex_lock(&st->lock);
451 ret = ad2s1210_config_write(st, iattr->address);
452 if (ret < 0)
453 goto error_ret;
454 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
455 error_ret:
456 mutex_unlock(&st->lock);
457 return ret < 0 ? ret : len;
458 }
459
ad2s1210_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)460 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
461 struct iio_chan_spec const *chan,
462 int *val,
463 int *val2,
464 long m)
465 {
466 struct ad2s1210_state *st = iio_priv(indio_dev);
467 u16 negative;
468 int ret = 0;
469 u16 pos;
470 s16 vel;
471
472 mutex_lock(&st->lock);
473 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
474 /* delay (6 * tck + 20) nano seconds */
475 udelay(1);
476
477 switch (chan->type) {
478 case IIO_ANGL:
479 ad2s1210_set_mode(MOD_POS, st);
480 break;
481 case IIO_ANGL_VEL:
482 ad2s1210_set_mode(MOD_VEL, st);
483 break;
484 default:
485 ret = -EINVAL;
486 break;
487 }
488 if (ret < 0)
489 goto error_ret;
490 ret = spi_read(st->sdev, st->rx, 2);
491 if (ret < 0)
492 goto error_ret;
493
494 switch (chan->type) {
495 case IIO_ANGL:
496 pos = be16_to_cpup((__be16 *)st->rx);
497 if (st->hysteresis)
498 pos >>= 16 - st->resolution;
499 *val = pos;
500 ret = IIO_VAL_INT;
501 break;
502 case IIO_ANGL_VEL:
503 vel = be16_to_cpup((__be16 *)st->rx);
504 vel >>= 16 - st->resolution;
505 if (vel & 0x8000) {
506 negative = (0xffff >> st->resolution) << st->resolution;
507 vel |= negative;
508 }
509 *val = vel;
510 ret = IIO_VAL_INT;
511 break;
512 default:
513 mutex_unlock(&st->lock);
514 return -EINVAL;
515 }
516
517 error_ret:
518 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
519 /* delay (2 * tck + 20) nano seconds */
520 udelay(1);
521 mutex_unlock(&st->lock);
522 return ret;
523 }
524
525 static IIO_DEVICE_ATTR(fclkin, 0644,
526 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
527 static IIO_DEVICE_ATTR(fexcit, 0644,
528 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
529 static IIO_DEVICE_ATTR(control, 0644,
530 ad2s1210_show_control, ad2s1210_store_control, 0);
531 static IIO_DEVICE_ATTR(bits, 0644,
532 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
533 static IIO_DEVICE_ATTR(fault, 0644,
534 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
535
536 static IIO_DEVICE_ATTR(los_thrd, 0644,
537 ad2s1210_show_reg, ad2s1210_store_reg,
538 AD2S1210_REG_LOS_THRD);
539 static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644,
540 ad2s1210_show_reg, ad2s1210_store_reg,
541 AD2S1210_REG_DOS_OVR_THRD);
542 static IIO_DEVICE_ATTR(dos_mis_thrd, 0644,
543 ad2s1210_show_reg, ad2s1210_store_reg,
544 AD2S1210_REG_DOS_MIS_THRD);
545 static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644,
546 ad2s1210_show_reg, ad2s1210_store_reg,
547 AD2S1210_REG_DOS_RST_MAX_THRD);
548 static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644,
549 ad2s1210_show_reg, ad2s1210_store_reg,
550 AD2S1210_REG_DOS_RST_MIN_THRD);
551 static IIO_DEVICE_ATTR(lot_high_thrd, 0644,
552 ad2s1210_show_reg, ad2s1210_store_reg,
553 AD2S1210_REG_LOT_HIGH_THRD);
554 static IIO_DEVICE_ATTR(lot_low_thrd, 0644,
555 ad2s1210_show_reg, ad2s1210_store_reg,
556 AD2S1210_REG_LOT_LOW_THRD);
557
558 static const struct iio_chan_spec ad2s1210_channels[] = {
559 {
560 .type = IIO_ANGL,
561 .indexed = 1,
562 .channel = 0,
563 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
564 }, {
565 .type = IIO_ANGL_VEL,
566 .indexed = 1,
567 .channel = 0,
568 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
569 }
570 };
571
572 static struct attribute *ad2s1210_attributes[] = {
573 &iio_dev_attr_fclkin.dev_attr.attr,
574 &iio_dev_attr_fexcit.dev_attr.attr,
575 &iio_dev_attr_control.dev_attr.attr,
576 &iio_dev_attr_bits.dev_attr.attr,
577 &iio_dev_attr_fault.dev_attr.attr,
578 &iio_dev_attr_los_thrd.dev_attr.attr,
579 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
580 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
581 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
582 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
583 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
584 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
585 NULL,
586 };
587
588 static const struct attribute_group ad2s1210_attribute_group = {
589 .attrs = ad2s1210_attributes,
590 };
591
ad2s1210_initial(struct ad2s1210_state * st)592 static int ad2s1210_initial(struct ad2s1210_state *st)
593 {
594 unsigned char data;
595 int ret;
596
597 mutex_lock(&st->lock);
598 ad2s1210_set_resolution_pin(st);
599
600 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
601 if (ret < 0)
602 goto error_ret;
603 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
604 data |= (st->resolution - 10) >> 1;
605 ret = ad2s1210_config_write(st, data);
606 if (ret < 0)
607 goto error_ret;
608 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
609 if (ret < 0)
610 goto error_ret;
611
612 if (ret & AD2S1210_MSB_IS_HIGH) {
613 ret = -EIO;
614 goto error_ret;
615 }
616
617 ret = ad2s1210_update_frequency_control_word(st);
618 if (ret < 0)
619 goto error_ret;
620 ret = ad2s1210_soft_reset(st);
621 error_ret:
622 mutex_unlock(&st->lock);
623 return ret;
624 }
625
626 static const struct iio_info ad2s1210_info = {
627 .read_raw = ad2s1210_read_raw,
628 .attrs = &ad2s1210_attribute_group,
629 };
630
ad2s1210_setup_gpios(struct ad2s1210_state * st)631 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
632 {
633 struct spi_device *spi = st->sdev;
634 int i, ret;
635
636 for (i = 0; i < ARRAY_SIZE(gpios); i++) {
637 st->gpios[i] = devm_gpiod_get(&spi->dev, gpios[i].name,
638 gpios[i].flags);
639 if (IS_ERR(st->gpios[i])) {
640 ret = PTR_ERR(st->gpios[i]);
641 dev_err(&spi->dev,
642 "ad2s1210: failed to request %s GPIO: %d\n",
643 gpios[i].name, ret);
644 return ret;
645 }
646 }
647
648 return 0;
649 }
650
ad2s1210_probe(struct spi_device * spi)651 static int ad2s1210_probe(struct spi_device *spi)
652 {
653 struct iio_dev *indio_dev;
654 struct ad2s1210_state *st;
655 int ret;
656
657 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
658 if (!indio_dev)
659 return -ENOMEM;
660 st = iio_priv(indio_dev);
661 ret = ad2s1210_setup_gpios(st);
662 if (ret < 0)
663 return ret;
664
665 spi_set_drvdata(spi, indio_dev);
666
667 mutex_init(&st->lock);
668 st->sdev = spi;
669 st->hysteresis = true;
670 st->mode = MOD_CONFIG;
671 st->resolution = 12;
672 st->fexcit = AD2S1210_DEF_EXCIT;
673
674 indio_dev->info = &ad2s1210_info;
675 indio_dev->modes = INDIO_DIRECT_MODE;
676 indio_dev->channels = ad2s1210_channels;
677 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
678 indio_dev->name = spi_get_device_id(spi)->name;
679
680 ret = devm_iio_device_register(&spi->dev, indio_dev);
681 if (ret)
682 return ret;
683
684 st->fclkin = spi->max_speed_hz;
685 spi->mode = SPI_MODE_3;
686 spi_setup(spi);
687 ad2s1210_initial(st);
688
689 return 0;
690 }
691
692 static const struct of_device_id ad2s1210_of_match[] = {
693 { .compatible = "adi,ad2s1210", },
694 { }
695 };
696 MODULE_DEVICE_TABLE(of, ad2s1210_of_match);
697
698 static const struct spi_device_id ad2s1210_id[] = {
699 { "ad2s1210" },
700 {}
701 };
702 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
703
704 static struct spi_driver ad2s1210_driver = {
705 .driver = {
706 .name = DRV_NAME,
707 .of_match_table = of_match_ptr(ad2s1210_of_match),
708 },
709 .probe = ad2s1210_probe,
710 .id_table = ad2s1210_id,
711 };
712 module_spi_driver(ad2s1210_driver);
713
714 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
715 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
716 MODULE_LICENSE("GPL v2");
717