Lines Matching +full:tx +full:- +full:fault +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0+
8 * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
26 #include <asm/mach-pic32/pic32.h>
29 #define PIC32_DEV_NAME "pic32-uart"
43 /* struct pic32_sport - pic32 serial port descriptor
46 * @irq_fault: virtual fault interrupt number
47 * @irq_fault_name: irq fault name
50 * @irq_tx: virtual tx interrupt number
51 * @irq_tx_name: irq tx name
82 __raw_writel(val, sport->port.membase + reg); in pic32_uart_writel()
87 return __raw_readl(sport->port.membase + reg); in pic32_uart_readl()
131 /* wait for tx empty, otherwise chars will be lost or corrupted */ in pic32_wait_deplete_txbuf()
136 /* serial core request to check if uart tx buffer is empty */
166 if (!sport->cts_gpiod) in pic32_uart_get_mctrl()
168 else if (gpiod_get_value(sport->cts_gpiod)) in pic32_uart_get_mctrl()
180 /* stop tx and start tx are not called in pairs, therefore a flag indicates
181 * the status of irq to control the irq-depth.
185 if (en && !sport->enable_tx_irq) { in pic32_uart_irqtxen()
186 enable_irq(sport->irq_tx); in pic32_uart_irqtxen()
187 sport->enable_tx_irq = true; in pic32_uart_irqtxen()
188 } else if (!en && sport->enable_tx_irq) { in pic32_uart_irqtxen()
193 disable_irq_nosync(sport->irq_tx); in pic32_uart_irqtxen()
194 sport->enable_tx_irq = false; in pic32_uart_irqtxen()
198 /* serial core request to disable tx ASAP (used for flow control) */
209 /* wait for tx empty */ in pic32_uart_stop_tx()
217 /* serial core request to (re)enable tx */
233 disable_irq(sport->irq_rx); in pic32_uart_stop_rx()
246 spin_lock_irqsave(&port->lock, flags); in pic32_uart_break_ctl()
255 spin_unlock_irqrestore(&port->lock, flags); in pic32_uart_break_ctl()
261 return (port->type == PORT_PIC32) ? PIC32_DEV_NAME : NULL; in pic32_uart_type()
277 spin_lock(&port->lock); in pic32_uart_do_rx()
279 tty = &port->state->port; in pic32_uart_do_rx()
293 port->icount.overrun++; in pic32_uart_do_rx()
304 port->icount.rx++; in pic32_uart_do_rx()
313 port->icount.parity++; in pic32_uart_do_rx()
315 port->icount.frame++; in pic32_uart_do_rx()
318 sta_reg &= port->read_status_mask; in pic32_uart_do_rx()
329 if ((sta_reg & port->ignore_status_mask) == 0) in pic32_uart_do_rx()
332 } while (--max_count); in pic32_uart_do_rx()
334 spin_unlock(&port->lock); in pic32_uart_do_rx()
339 /* fill tx fifo with chars to send, stop when fifo is about to be full
345 struct circ_buf *xmit = &port->state->xmit; in pic32_uart_do_tx()
348 if (port->x_char) { in pic32_uart_do_tx()
349 pic32_uart_writel(sport, PIC32_UART_TX, port->x_char); in pic32_uart_do_tx()
350 port->icount.tx++; in pic32_uart_do_tx()
351 port->x_char = 0; in pic32_uart_do_tx()
363 /* keep stuffing chars into uart tx buffer in pic32_uart_do_tx()
374 unsigned int c = xmit->buf[xmit->tail]; in pic32_uart_do_tx()
381 if (--max_count == 0) in pic32_uart_do_tx()
407 /* TX interrupt handler */
413 spin_lock_irqsave(&port->lock, flags); in pic32_uart_tx_interrupt()
415 spin_unlock_irqrestore(&port->lock, flags); in pic32_uart_tx_interrupt()
420 /* FAULT interrupt handler */
427 /* enable rx & tx operation on uart */
438 /* disable rx & tx operation on uart */
443 /* wait for tx empty, otherwise chars will be lost or corrupted */ in pic32_uart_dsbl_and_mask()
456 u32 dflt_baud = (port->uartclk / PIC32_UART_DFLT_BRATE / 16) - 1; in pic32_uart_startup()
462 ret = clk_prepare_enable(sport->clk); in pic32_uart_startup()
486 sport->enable_tx_irq = false; in pic32_uart_startup()
488 sport->irq_fault_name = kasprintf(GFP_KERNEL, "%s%d-fault", in pic32_uart_startup()
490 sport->idx); in pic32_uart_startup()
491 if (!sport->irq_fault_name) { in pic32_uart_startup()
492 dev_err(port->dev, "%s: kasprintf err!", __func__); in pic32_uart_startup()
493 ret = -ENOMEM; in pic32_uart_startup()
496 irq_set_status_flags(sport->irq_fault, IRQ_NOAUTOEN); in pic32_uart_startup()
497 ret = request_irq(sport->irq_fault, pic32_uart_fault_interrupt, in pic32_uart_startup()
498 IRQF_NO_THREAD, sport->irq_fault_name, port); in pic32_uart_startup()
500 dev_err(port->dev, "%s: request irq(%d) err! ret:%d name:%s\n", in pic32_uart_startup()
501 __func__, sport->irq_fault, ret, in pic32_uart_startup()
506 sport->irq_rx_name = kasprintf(GFP_KERNEL, "%s%d-rx", in pic32_uart_startup()
508 sport->idx); in pic32_uart_startup()
509 if (!sport->irq_rx_name) { in pic32_uart_startup()
510 dev_err(port->dev, "%s: kasprintf err!", __func__); in pic32_uart_startup()
511 ret = -ENOMEM; in pic32_uart_startup()
514 irq_set_status_flags(sport->irq_rx, IRQ_NOAUTOEN); in pic32_uart_startup()
515 ret = request_irq(sport->irq_rx, pic32_uart_rx_interrupt, in pic32_uart_startup()
516 IRQF_NO_THREAD, sport->irq_rx_name, port); in pic32_uart_startup()
518 dev_err(port->dev, "%s: request irq(%d) err! ret:%d name:%s\n", in pic32_uart_startup()
519 __func__, sport->irq_rx, ret, in pic32_uart_startup()
524 sport->irq_tx_name = kasprintf(GFP_KERNEL, "%s%d-tx", in pic32_uart_startup()
526 sport->idx); in pic32_uart_startup()
527 if (!sport->irq_tx_name) { in pic32_uart_startup()
528 dev_err(port->dev, "%s: kasprintf err!", __func__); in pic32_uart_startup()
529 ret = -ENOMEM; in pic32_uart_startup()
532 irq_set_status_flags(sport->irq_tx, IRQ_NOAUTOEN); in pic32_uart_startup()
533 ret = request_irq(sport->irq_tx, pic32_uart_tx_interrupt, in pic32_uart_startup()
534 IRQF_NO_THREAD, sport->irq_tx_name, port); in pic32_uart_startup()
536 dev_err(port->dev, "%s: request irq(%d) err! ret:%d name:%s\n", in pic32_uart_startup()
537 __func__, sport->irq_tx, ret, in pic32_uart_startup()
557 enable_irq(sport->irq_rx); in pic32_uart_startup()
562 free_irq(sport->irq_tx, port); in pic32_uart_startup()
563 kfree(sport->irq_tx_name); in pic32_uart_startup()
565 free_irq(sport->irq_rx, port); in pic32_uart_startup()
566 kfree(sport->irq_rx_name); in pic32_uart_startup()
568 free_irq(sport->irq_fault, port); in pic32_uart_startup()
569 kfree(sport->irq_fault_name); in pic32_uart_startup()
571 clk_disable_unprepare(sport->clk); in pic32_uart_startup()
583 spin_lock_irqsave(&port->lock, flags); in pic32_uart_shutdown()
585 spin_unlock_irqrestore(&port->lock, flags); in pic32_uart_shutdown()
586 clk_disable_unprepare(sport->clk); in pic32_uart_shutdown()
589 free_irq(sport->irq_fault, port); in pic32_uart_shutdown()
590 kfree(sport->irq_fault_name); in pic32_uart_shutdown()
591 free_irq(sport->irq_tx, port); in pic32_uart_shutdown()
592 kfree(sport->irq_tx_name); in pic32_uart_shutdown()
593 free_irq(sport->irq_rx, port); in pic32_uart_shutdown()
594 kfree(sport->irq_rx_name); in pic32_uart_shutdown()
607 spin_lock_irqsave(&port->lock, flags); in pic32_uart_set_termios()
613 if (new->c_cflag & CSTOPB) in pic32_uart_set_termios()
621 if (new->c_cflag & PARENB) { in pic32_uart_set_termios()
622 if (new->c_cflag & PARODD) { in pic32_uart_set_termios()
639 if ((new->c_cflag & CRTSCTS) && sport->cts_gpiod) { in pic32_uart_set_termios()
657 /* Always 8-bit */ in pic32_uart_set_termios()
658 new->c_cflag |= CS8; in pic32_uart_set_termios()
661 new->c_cflag &= ~CMSPAR; in pic32_uart_set_termios()
664 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16); in pic32_uart_set_termios()
665 quot = uart_get_divisor(port, baud) - 1; in pic32_uart_set_termios()
667 uart_update_timeout(port, new->c_cflag, baud); in pic32_uart_set_termios()
675 spin_unlock_irqrestore(&port->lock, flags); in pic32_uart_set_termios()
681 struct platform_device *pdev = to_platform_device(port->dev); in pic32_uart_request_port()
686 return -EINVAL; in pic32_uart_request_port()
688 if (!request_mem_region(port->mapbase, resource_size(res_mem), in pic32_uart_request_port()
690 return -EBUSY; in pic32_uart_request_port()
692 port->membase = devm_ioremap(port->dev, port->mapbase, in pic32_uart_request_port()
694 if (!port->membase) { in pic32_uart_request_port()
695 dev_err(port->dev, "Unable to map registers\n"); in pic32_uart_request_port()
696 release_mem_region(port->mapbase, resource_size(res_mem)); in pic32_uart_request_port()
697 return -ENOMEM; in pic32_uart_request_port()
706 struct platform_device *pdev = to_platform_device(port->dev); in pic32_uart_release_port()
715 release_mem_region(port->mapbase, res_size); in pic32_uart_release_port()
718 /* serial core request to do any port required auto-configuration */
724 port->type = PORT_PIC32; in pic32_uart_config_port()
732 if (port->type != PORT_PIC32) in pic32_uart_verify_port()
733 return -EINVAL; in pic32_uart_verify_port()
734 if (port->irq != serinfo->irq) in pic32_uart_verify_port()
735 return -EINVAL; in pic32_uart_verify_port()
736 if (port->iotype != serinfo->io_type) in pic32_uart_verify_port()
737 return -EINVAL; in pic32_uart_verify_port()
738 if (port->mapbase != (unsigned long)serinfo->iomem_base) in pic32_uart_verify_port()
739 return -EINVAL; in pic32_uart_verify_port()
775 /* wait for tx empty */ in pic32_console_putchar()
785 struct pic32_sport *sport = pic32_sports[co->index]; in pic32_console_write()
788 uart_console_write(&sport->port, s, count, pic32_console_putchar); in pic32_console_write()
803 if (unlikely(co->index < 0 || co->index >= PIC32_MAX_UARTS)) in pic32_console_setup()
804 return -ENODEV; in pic32_console_setup()
806 sport = pic32_sports[co->index]; in pic32_console_setup()
808 return -ENODEV; in pic32_console_setup()
810 ret = clk_prepare_enable(sport->clk); in pic32_console_setup()
817 return uart_set_options(&sport->port, co, baud, parity, bits, flow); in pic32_console_setup()
827 .index = -1,
866 struct device *dev = &pdev->dev; in pic32_uart_probe()
867 struct device_node *np = dev->of_node; in pic32_uart_probe()
876 return -EINVAL; in pic32_uart_probe()
880 return -EINVAL; in pic32_uart_probe()
882 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in pic32_uart_probe()
884 return -ENOMEM; in pic32_uart_probe()
886 sport->idx = uart_idx; in pic32_uart_probe()
887 sport->irq_fault = irq_of_parse_and_map(np, 0); in pic32_uart_probe()
888 sport->irq_rx = irq_of_parse_and_map(np, 1); in pic32_uart_probe()
889 sport->irq_tx = irq_of_parse_and_map(np, 2); in pic32_uart_probe()
890 sport->clk = devm_clk_get(&pdev->dev, NULL); in pic32_uart_probe()
891 if (IS_ERR(sport->clk)) in pic32_uart_probe()
892 return PTR_ERR(sport->clk); in pic32_uart_probe()
893 sport->dev = &pdev->dev; in pic32_uart_probe()
895 /* Hardware flow control: gpios in pic32_uart_probe()
898 sport->cts_gpiod = devm_gpiod_get_optional(dev, "cts", GPIOD_IN); in pic32_uart_probe()
899 if (IS_ERR(sport->cts_gpiod)) in pic32_uart_probe()
900 return dev_err_probe(dev, PTR_ERR(sport->cts_gpiod), "error requesting CTS GPIO\n"); in pic32_uart_probe()
901 gpiod_set_consumer_name(sport->cts_gpiod, "CTS"); in pic32_uart_probe()
904 port = &sport->port; in pic32_uart_probe()
905 port->iotype = UPIO_MEM; in pic32_uart_probe()
906 port->mapbase = res_mem->start; in pic32_uart_probe()
907 port->ops = &pic32_uart_ops; in pic32_uart_probe()
908 port->flags = UPF_BOOT_AUTOCONF; in pic32_uart_probe()
909 port->dev = &pdev->dev; in pic32_uart_probe()
910 port->fifosize = PIC32_UART_TX_FIFO_DEPTH; in pic32_uart_probe()
911 port->uartclk = clk_get_rate(sport->clk); in pic32_uart_probe()
912 port->line = uart_idx; in pic32_uart_probe()
916 port->membase = NULL; in pic32_uart_probe()
917 dev_err(port->dev, "%s: uart add port error!\n", __func__); in pic32_uart_probe()
926 clk_disable_unprepare(sport->clk); in pic32_uart_probe()
932 dev_info(&pdev->dev, "%s: uart(%d) driver initialized.\n", in pic32_uart_probe()
937 /* automatic unroll of sport and gpios */ in pic32_uart_probe()
947 clk_disable_unprepare(sport->clk); in pic32_uart_remove()
949 pic32_sports[sport->idx] = NULL; in pic32_uart_remove()
951 /* automatic unroll of sport and gpios */ in pic32_uart_remove()
956 { .compatible = "microchip,pic32mzda-uart" },
1002 MODULE_AUTHOR("Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>");