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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Daltr,tse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/altr,tse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Altera Triple Speed Ethernet MAC driver (TSE)
10 - Maxime Chevallier <maxime.chevallier@bootlin.com>
15 - const: altr,tse-1.0
16 - const: ALTR,tse-1.0
18 - const: altr,tse-msgdma-1.0
23 interrupt-names:
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/openbmc/u-boot/doc/device-tree-bindings/net/
H A Daltera_tse.txt1 * Altera Triple-Speed Ethernet MAC driver (TSE)
4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
6 - reg: Address and length of the register set for the device. It contains
7 the information of registers in the same order as described by reg-names
8 - reg-names: Should contain the reg names
16 - interrupts: Should contain the TSE interrupts and it's mode.
17 - interrupt-names: Should contain the interrupt names
20 - rx-fifo-depth: MAC receive FIFO buffer depth in bytes
21 - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
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/openbmc/linux/drivers/net/ethernet/altera/
H A Daltera_tse_main.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
30 #include <linux/mdio/mdio-regmap.h>
36 #include <linux/pcs-lynx.h>
50 static int debug = -1;
52 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
69 #define POLL_PHY (-1)
81 #define TSE_TX_THRESH(x) (x->tx_ring_size / 4)
89 return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1; in tse_tx_avail()
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H A Daltera_tse.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
113 /* MDIO registers within MAC register Space
120 u32 auto_negotiation_advertisement; /* Auto-negotiation
172 /* 32-bit primary MAC address word 0 bits 0 to 31 of the primary
176 /* 32-bit primary MAC address word 1 bits 32 to 47 of the primary
180 /* 14-bit maximum frame length. The MAC receive logic */
186 /* 12-bit receive FIFO section-empty threshold */
188 /* 12-bit receive FIFO section-full threshold */
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/openbmc/linux/arch/nios2/boot/dts/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
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H A D3c120_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "altr,nios2-1.0";
24 interrupt-controller;
25 #interrupt-cells = <1>;
26 clock-frequency = <125000000>;
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/openbmc/u-boot/arch/nios2/dts/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
12 compatible = "altr,niosii-max10";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 u-boot,dm-pre-reloc;
23 compatible = "altr,nios2-1.1";
25 interrupt-controller;
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H A D3c120_devboard.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "altr,nios2-1.0";
24 interrupt-controller;
25 #interrupt-cells = <1>;
26 clock-frequency = <125000000>;
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/openbmc/u-boot/drivers/net/
H A Daltera_tse.c19 #include <asm/dma-mapping.h>
41 next->descriptor_control = next->descriptor_control & in alt_sgdma_construct_descriptor()
45 desc->source = virt_to_phys(read_addr); in alt_sgdma_construct_descriptor()
46 desc->destination = virt_to_phys(write_addr); in alt_sgdma_construct_descriptor()
47 desc->next = virt_to_phys(next); in alt_sgdma_construct_descriptor()
48 desc->bytes_to_transfer = length_or_eop; in alt_sgdma_construct_descriptor()
52 * - Set "owned by hardware" bit in alt_sgdma_construct_descriptor()
53 * - Optionally set "generate EOP" bit in alt_sgdma_construct_descriptor()
54 * - Optionally set the "read from fixed address" bit in alt_sgdma_construct_descriptor()
55 * - Optionally set the "write to fixed address bit (which serves in alt_sgdma_construct_descriptor()
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H A DKconfig11 This is currently implemented in net/eth-uclass.c
43 bool "Altera Triple-Speed Ethernet MAC support"
47 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
48 Please find details on the "Triple-Speed Ethernet MegaCore Function
134 U-Boot.
152 in U-Boot to the RAW AF_PACKET API in Linux. This allows real
181 bool "Share the MDIO bus for FEC controller"
185 hex "MDIO base address for the FEC controller"
188 This specifies the MDIO registers base address. It is used when
189 two FEC controllers share MDIO bus.
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/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-socfpga.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Adopted from dwmac-sti.c
7 #include <linux/mfd/altera-sysmgr.h>
13 #include <linux/mdio/mdio-regmap.h>
14 #include <linux/pcs-lynx.h>
67 void __iomem *splitter_base = dwmac->splitter_base; in socfpga_dwmac_fix_mac_speed()
68 void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base; in socfpga_dwmac_fix_mac_speed()
69 struct device *dev = dwmac->dev; in socfpga_dwmac_fix_mac_speed()
71 struct phy_device *phy_dev = ndev->phydev; in socfpga_dwmac_fix_mac_speed()
105 struct device_node *np = dev->of_node; in socfpga_dwmac_parse_data()
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H A Dstmmac_main.c1 // SPDX-License-Identifier: GPL-2.0-only
3 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
6 Copyright(C) 2007-2011 STMicroelectronics Ltd
29 #include <linux/dma-mapping.h>
55 * with fine resolution and binary rollover. This avoid non-monotonic behavior
62 #define TSO_MAX_BUFF_SIZE (SZ_16K - 1)
70 static int debug = -1;
72 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
74 static int phyaddr = -1;
78 #define STMMAC_TX_THRESH(x) ((x)->dma_conf.dma_tx_size / 4)
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/openbmc/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
118 #include <linux/mdio.h>
125 #include "xgbe-common.h"
129 return pdata->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; in xgbe_get_max_frame()
138 DBGPR("-->xgbe_usec_to_riwt\n"); in xgbe_usec_to_riwt()
140 rate = pdata->sysclk_rate; in xgbe_usec_to_riwt()
150 DBGPR("<--xgbe_usec_to_riwt\n"); in xgbe_usec_to_riwt()
161 DBGPR("-->xgbe_riwt_to_usec\n"); in xgbe_riwt_to_usec()
163 rate = pdata->sysclk_rate; in xgbe_riwt_to_usec()
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/openbmc/linux/
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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