/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | allwinner,sun6i-a31-spi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A31 SPI Controller 10 - $ref: spi-controller.yaml 13 - Chen-Yu Tsai <wens@csie.org> 14 - Maxime Ripard <mripard@kernel.org> 19 - const: allwinner,sun50i-r329-spi 20 - const: allwinner,sun6i-a31-spi [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | sunxi-h3-h5.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/sun8i-de2.h> 44 #include <dt-bindings/clock/sun8i-h3-ccu.h> 45 #include <dt-bindings/clock/sun8i-r-ccu.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/reset/sun8i-de2.h> 48 #include <dt-bindings/reset/sun8i-h3-ccu.h> 49 #include <dt-bindings/reset/sun8i-r-ccu.h> 52 interrupt-parent = <&gic>; 53 #address-cells = <1>; [all …]
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H A D | sun8i-h2-plus-orangepi-zero.dts | 4 * Based on sun8i-h3-orangepi-one.dts, which is: 7 * This file is dual-licensed: you can use it either under the terms 46 /dts-v1/; 47 #include "sun8i-h3.dtsi" 48 #include "sunxi-common-regulators.dtsi" 50 #include <dt-bindings/gpio/gpio.h> 51 #include <dt-bindings/input/input.h> 55 compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus"; 59 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ 65 stdout-path = "serial0:115200n8"; [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0+ 3 dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb 4 dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb 5 dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb 6 dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb 8 dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb 9 dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb 10 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ 11 exynos4210-smdkv310.dtb \ 12 exynos4210-universal_c210.dtb \ [all …]
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H A D | sun50i-a64.dtsi | 3 * based on the Allwinner H3 dtsi: 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/clock/sun50i-a64-ccu.h> 46 #include <dt-bindings/clock/sun8i-de2.h> 47 #include <dt-bindings/clock/sun8i-r-ccu.h> 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 #include <dt-bindings/reset/sun50i-a64-ccu.h> 50 #include <dt-bindings/reset/sun8i-de2.h> 51 #include <dt-bindings/reset/sun8i-r-ccu.h> 54 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sunxi-h3-h5.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/sun6i-rtc.h> 44 #include <dt-bindings/clock/sun8i-de2.h> 45 #include <dt-bindings/clock/sun8i-h3-ccu.h> 46 #include <dt-bindings/clock/sun8i-r-ccu.h> 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 48 #include <dt-bindings/reset/sun8i-de2.h> 49 #include <dt-bindings/reset/sun8i-h3-ccu.h> 50 #include <dt-bindings/reset/sun8i-r-ccu.h> 53 interrupt-parent = <&gic>; [all …]
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H A D | sun8i-h2-plus-orangepi-zero.dts | 4 * Based on sun8i-h3-orangepi-one.dts, which is: 7 * This file is dual-licensed: you can use it either under the terms 46 /dts-v1/; 47 #include "sun8i-h3.dtsi" 48 #include "sunxi-common-regulators.dtsi" 50 #include <dt-bindings/gpio/gpio.h> 51 #include <dt-bindings/input/input.h> 55 compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus"; 59 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ 65 stdout-path = "serial0:115200n8"; [all …]
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H A D | sun8i-r40.dtsi | 2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org> 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 #include <dt-bindings/clock/sun6i-rtc.h> 46 #include <dt-bindings/clock/sun8i-de2.h> 47 #include <dt-bindings/clock/sun8i-r40-ccu.h> 48 #include <dt-bindings/clock/sun8i-tcon-top.h> 49 #include <dt-bindings/reset/sun8i-r40-ccu.h> 50 #include <dt-bindings/reset/sun8i-de2.h> 51 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | sun8i-v3s.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 #include <dt-bindings/clock/sun6i-rtc.h> 46 #include <dt-bindings/clock/sun8i-v3s-ccu.h> 47 #include <dt-bindings/reset/sun8i-v3s-ccu.h> 48 #include <dt-bindings/clock/sun8i-de2.h> 51 #address-cells = <1>; 52 #size-cells = <1>; 53 interrupt-parent = <&gic>; 56 #address-cells = <1>; [all …]
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H A D | suniv-f1c100s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11) 7 #include <dt-bindings/clock/suniv-ccu-f1c100s.h> 8 #include <dt-bindings/reset/suniv-ccu-f1c100s.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&intc>; 16 osc24M: clk-24M { 17 #clock-cells = <0>; 18 compatible = "fixed-clock"; 19 clock-frequency = <24000000>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/rtc/ |
H A D | allwinner,sun6i-a31-rtc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/rtc/allwinner,sun6i-a31-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#clock-cells": 19 - enum: 20 - allwinner,sun6i-a31-rtc 21 - allwinner,sun8i-a23-rtc [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | sunxi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR X11) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 19 - description: Allwinner A100 Perf1 Board 21 - const: allwinner,a100-perf1 22 - const: allwinner,sun50i-a100 24 - description: Allwinner A23 Evaluation Board 26 - const: allwinner,sun8i-a23-evb [all …]
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/openbmc/u-boot/arch/arm/mach-sunxi/ |
H A D | Kconfig | 4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64 24 Select this dram controller driver for Sun8i platforms, 30 Select this dram controller driver for Sun8i platforms, 36 Select this dram controller driver for Sun8i platforms, 87 ---help--- 100 ---help--- 102 as the original A10 (mach-sun4i). 106 ---help--- 113 ---help--- 115 DesignWare controller used in H3, mainly SoCs after H3, which do [all …]
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/openbmc/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-a64.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 // based on the Allwinner H3 dtsi: 6 #include <dt-bindings/clock/sun50i-a64-ccu.h> 7 #include <dt-bindings/clock/sun6i-rtc.h> 8 #include <dt-bindings/clock/sun8i-de2.h> 9 #include <dt-bindings/clock/sun8i-r-ccu.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/sun50i-a64-ccu.h> 12 #include <dt-bindings/reset/sun8i-de2.h> 13 #include <dt-bindings/reset/sun8i-r-ccu.h> [all …]
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H A D | sun50i-h616.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/sun50i-h616-ccu.h> 8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h> 9 #include <dt-bindings/clock/sun6i-rtc.h> 10 #include <dt-bindings/reset/sun50i-h616-ccu.h> 11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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H A D | sun50i-h6.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/sun50i-h6-ccu.h> 6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h> 7 #include <dt-bindings/clock/sun6i-rtc.h> 8 #include <dt-bindings/clock/sun8i-de2.h> 9 #include <dt-bindings/clock/sun8i-tcon-top.h> 10 #include <dt-bindings/reset/sun50i-h6-ccu.h> 11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h> 12 #include <dt-bindings/reset/sun8i-de2.h> [all …]
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/openbmc/u-boot/drivers/net/ |
H A D | Kconfig | 11 This is currently implemented in net/eth-uclass.c 43 bool "Altera Triple-Speed Ethernet MAC support" 47 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 48 Please find details on the "Triple-Speed Ethernet MegaCore Function 114 bool "Allow access to the Intel 8257x SPI bus" 117 Allow generic access to the SPI bus on the Intel 8257x, for 121 bool "Enable SPI bus utility code" 124 Utility code for direct access to the SPI bus on Intel 8257x. 133 used on devices with SPI support you can reprogram the EEPROM from 134 U-Boot. [all …]
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/openbmc/linux/drivers/net/can/spi/mcp251xfd/ |
H A D | mcp251xfd-core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver 6 // Marc Kleine-Budde <kernel@pengutronix.de> 10 // CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface 97 return __mcp251xfd_get_model_str(priv->devtype_data.model); in mcp251xfd_get_model_str() 142 if (!priv->reg_vdd) in mcp251xfd_vdd_enable() 145 return regulator_enable(priv->reg_vdd); in mcp251xfd_vdd_enable() 150 if (!priv->reg_vdd) in mcp251xfd_vdd_disable() 153 return regulator_disable(priv->reg_vdd); in mcp251xfd_vdd_disable() 159 if (!priv->reg_xceiver) in mcp251xfd_transceiver_enable() [all …]
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/openbmc/u-boot/drivers/spi/ |
H A D | spi-sunxi.c | 9 * Based on linux spi driver. Original copyright follows: 10 * linux/drivers/spi/spi-sun4i.c 12 * Copyright (C) 2012 - 2014 Allwinner Tech 16 * Maxime Ripard <maxime.ripard@free-electrons.com> 18 * SPDX-License-Identifier: GPL-2.0+ 24 #include <spi.h> 38 /* sun4i spi registers */ 47 /* sun6i spi registers */ 59 /* sun spi bits */ 77 #define SPI_REG(priv, reg) ((priv)->base + \ [all …]
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/openbmc/linux/drivers/spi/ |
H A D | spi-sun6i.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2012 - 2014 Allwinner Tech 7 * Maxime Ripard <maxime.ripard@free-electrons.com> 23 #include <linux/spi/spi.h> 119 return readl(sspi->base_addr + reg); in sun6i_spi_read() 124 writel(value, sspi->base_addr + reg); in sun6i_spi_write() 157 while (len--) { in sun6i_spi_drain_fifo() 158 byte = readb(sspi->base_addr + SUN6I_RXDATA_REG); in sun6i_spi_drain_fifo() 159 if (sspi->rx_buf) in sun6i_spi_drain_fifo() 160 *sspi->rx_buf++ = byte; in sun6i_spi_drain_fifo() [all …]
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/openbmc/linux/ |
H A D | MAINTAINERS | 5 ---------- [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |