Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28 |
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#
9efa1a54 |
| 04-May-2023 |
Fedor Ross <fedor.ross@ifm.com> |
can: mcp251xfd: __mcp251xfd_chip_set_mode(): increase poll timeout
The mcp251xfd controller needs an idle bus to enter 'Normal CAN 2.0 mode' or . The maximum length of a CAN frame is 736 bits (64 da
can: mcp251xfd: __mcp251xfd_chip_set_mode(): increase poll timeout
The mcp251xfd controller needs an idle bus to enter 'Normal CAN 2.0 mode' or . The maximum length of a CAN frame is 736 bits (64 data bytes, CAN-FD, EFF mode, worst case bit stuffing and interframe spacing). For low bit rates like 10 kbit/s the arbitrarily chosen MCP251XFD_POLL_TIMEOUT_US of 1 ms is too small.
Otherwise during polling for the CAN controller to enter 'Normal CAN 2.0 mode' the timeout limit is exceeded and the configuration fails with:
| $ ip link set dev can1 up type can bitrate 10000 | [ 731.911072] mcp251xfd spi2.1 can1: Controller failed to enter mode CAN 2.0 Mode (6) and stays in Configuration Mode (4) (con=0x068b0760, osc=0x00000468). | [ 731.927192] mcp251xfd spi2.1 can1: CRC read error at address 0x0e0c (length=4, data=00 00 00 00, CRC=0x0000) retrying. | [ 731.938101] A link change request failed with some changes committed already. Interface can1 may have been left with an inconsistent configuration, please check. | RTNETLINK answers: Connection timed out
Make MCP251XFD_POLL_TIMEOUT_US timeout calculation dynamic. Use maximum of 1ms and bit time of 1 full 64 data bytes CAN-FD frame in EFF mode, worst case bit stuffing and interframe spacing at the current bit rate.
For easier backporting define the macro MCP251XFD_FRAME_LEN_MAX_BITS that holds the max frame length in bits, which is 736. This can be replaced by can_frame_bits(true, true, true, true, CANFD_MAX_DLEN) in a cleanup patch later.
Fixes: 55e5b97f003e8 ("can: mcp25xxfd: add driver for Microchip MCP25xxFD SPI CAN") Signed-off-by: Fedor Ross <fedor.ross@ifm.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/all/20230717-mcp251xfd-fix-increase-poll-timeout-v5-1-06600f34c684@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58 |
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#
b1f6b93e |
| 27-Jul-2022 |
Vincent Mailhol <mailhol.vincent@wanadoo.fr> |
can: mcp251xfd: advertise timestamping capabilities and add ioctl support
Currently, userland has no methods to query which timestamping features are supported by the mcp251xfd driver (aside maybe o
can: mcp251xfd: advertise timestamping capabilities and add ioctl support
Currently, userland has no methods to query which timestamping features are supported by the mcp251xfd driver (aside maybe of getting RX messages and observe whether or not hardware timestamps stay at zero).
The canonical way for a network driver to advertise what kind of timestamping it supports is to implement ethtool_ops::get_ts_info(). Here, we use the CAN specific can_ethtool_op_get_ts_info_hwts() function to achieve this.
In addition, the driver currently does not support the hardware timestamps ioctls. According to [1], SIOCSHWTSTAMP is "must" and SIOCGHWTSTAMP is "should". This patch fills up that gap by implementing net_device_ops::ndo_eth_ioctl() using the CAN specific function can_eth_ioctl_hwts().
[1] kernel doc Timestamping, section 3.1: "Hardware Timestamping Implementation: Device Drivers" Link: https://docs.kernel.org/networking/timestamping.html#hardware-timestamping-implementation-device-drivers
Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Link: https://lore.kernel.org/all/20220727101641.198847-10-mailhol.vincent@wanadoo.fr Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53 |
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#
db87c005 |
| 05-Jul-2022 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: fix detection of mcp251863
In commit c6f2a617a0a8 ("can: mcp251xfd: add support for mcp251863") support for the mcp251863 was added. However it was not taken into account that the au
can: mcp251xfd: fix detection of mcp251863
In commit c6f2a617a0a8 ("can: mcp251xfd: add support for mcp251863") support for the mcp251863 was added. However it was not taken into account that the auto detection of the chip model cannot distinguish between mcp2518fd and mcp251863 and would lead to a warning message if the firmware specifies a mcp251863.
Fix auto detection: If a mcp2518fd compatible chip is found, keep the mcp251863 if specified by firmware, use mcp2518fd instead.
Link: https://lore.kernel.org/all/20220706064835.1848864-1-mkl@pengutronix.de Fixes: c6f2a617a0a8 ("can: mcp251xfd: add support for mcp251863") Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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3e5c291c |
| 19-Jul-2022 |
Vincent Mailhol <mailhol.vincent@wanadoo.fr> |
can: add CAN_ERR_CNT flag to notify availability of error counter
Add a dedicated flag in uapi/linux/can/error.h to notify the userland that fields data[6] and data[7] of the CAN error frame were re
can: add CAN_ERR_CNT flag to notify availability of error counter
Add a dedicated flag in uapi/linux/can/error.h to notify the userland that fields data[6] and data[7] of the CAN error frame were respectively populated with the tx and rx error counters.
For all driver tree-wide, set up this flags whenever needed.
Link: https://lore.kernel.org/all/20220719143550.3681-12-mailhol.vincent@wanadoo.fr Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.15.52, v5.15.51, v5.15.50, v5.15.49 |
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1c0e78a2 |
| 20-Jun-2022 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_register_get_dev_id(): fix endianness conversion
In mcp251xfd_register_get_dev_id() the device ID register is read with handcrafted SPI transfers. As all registers, this re
can: mcp251xfd: mcp251xfd_register_get_dev_id(): fix endianness conversion
In mcp251xfd_register_get_dev_id() the device ID register is read with handcrafted SPI transfers. As all registers, this register is in little endian. Further it is not naturally aligned in struct mcp251xfd_map_buf_nocrc::data. However after the transfer the register content is converted from big endian to CPU endianness not taking care of being unaligned.
Fix the conversion by converting from little endian to CPU endianness taking the unaligned source into account.
Side note: So far the register content is 0x0 on all mcp251xfd compatible chips, and is only used for an informative printk.
Link: https://lore.kernel.org/all/20220627092859.809042-1-mkl@pengutronix.de Fixes: 55e5b97f003e ("can: mcp25xxfd: add driver for Microchip MCP25xxFD SPI CAN") Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.15.48 |
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#
0ff32bfa |
| 16-Jun-2022 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_register_get_dev_id(): use correct length to read dev_id
The device ID register is 32 bits wide. The driver uses incorrectly the size of a pointer to a u32 to calculate the
can: mcp251xfd: mcp251xfd_register_get_dev_id(): use correct length to read dev_id
The device ID register is 32 bits wide. The driver uses incorrectly the size of a pointer to a u32 to calculate the length of the SPI transfer. This results in a read of 2 registers on 64 bit platforms. This is no problem on the Linux side, as the RX buffer of the SPI transfer is large enough. In the mpc251xfd chip this results in the read of an undocumented register. So far no problems were observed.
Fix the length of the SPI transfer to read the device ID register only.
Link: https://lore.kernel.org/all/20220616094914.244440-1-mkl@pengutronix.de Fixes: 55e5b97f003e ("can: mcp25xxfd: add driver for Microchip MCP25xxFD SPI CAN") Reported-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.15.47, v5.15.46 |
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#
d5a972f5 |
| 06-Jun-2022 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_stop(): add missing hrtimer_cancel()
In commit 169d00a25658 ("can: mcp251xfd: add TX IRQ coalescing support") software based TX coalescing was added to the driver. The key
can: mcp251xfd: mcp251xfd_stop(): add missing hrtimer_cancel()
In commit 169d00a25658 ("can: mcp251xfd: add TX IRQ coalescing support") software based TX coalescing was added to the driver. The key idea is to keep the TX complete IRQ disabled for some time after processing it and re-enable later by a hrtimer. When bringing the interface down, this timer has to be stopped.
Add the missing hrtimer_cancel() of the tx_irq_time hrtimer to mcp251xfd_stop().
Link: https://lore.kernel.org/all/20220620143942.891811-1-mkl@pengutronix.de Fixes: 169d00a25658 ("can: mcp251xfd: add TX IRQ coalescing support") Cc: stable@vger.kernel.org # v5.18 Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31 |
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#
c6f2a617 |
| 22-Mar-2022 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: add support for mcp251863
The MCP251863 device is a CAN-FD controller (MCP2518FD) with an integrated transceiver (ATA6563). This patch add support for the new device.
Link: https://
can: mcp251xfd: add support for mcp251863
The MCP251863 device is a CAN-FD controller (MCP2518FD) with an integrated transceiver (ATA6563). This patch add support for the new device.
Link: https://lore.kernel.org/all/20220419072805.2840340-3-mkl@pengutronix.de Cc: Thomas Kopp <thomas.kopp@microchip.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.17, v5.15.30, v5.15.29 |
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#
eb38c205 |
| 14-Mar-2022 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: rx-offload: rename can_rx_offload_queue_sorted() -> can_rx_offload_queue_timestamp()
This patch renames the function can_rx_offload_queue_sorted() to can_rx_offload_queue_timestamp(). This bett
can: rx-offload: rename can_rx_offload_queue_sorted() -> can_rx_offload_queue_timestamp()
This patch renames the function can_rx_offload_queue_sorted() to can_rx_offload_queue_timestamp(). This better describes what the function does, it adds a newly RX'ed skb to the sorted queue by its timestamp.
Link: https://lore.kernel.org/all/20220417194327.2699059-1-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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fa7b514d |
| 19-Mar-2022 |
Tom Rix <trix@redhat.com> |
can: mcp251xfd: mcp251xfd_register_get_dev_id(): fix return of error value
Clang static analysis reports this issue:
| mcp251xfd-core.c:1813:7: warning: The left operand | of '&' is a garbage val
can: mcp251xfd: mcp251xfd_register_get_dev_id(): fix return of error value
Clang static analysis reports this issue:
| mcp251xfd-core.c:1813:7: warning: The left operand | of '&' is a garbage value | FIELD_GET(MCP251XFD_REG_DEVID_ID_MASK, dev_id), | ^ ~~~~~~
dev_id is set in a successful call to mcp251xfd_register_get_dev_id(). Though the status of calls made by mcp251xfd_register_get_dev_id() are checked and handled, their status' are not returned. So return err.
Fixes: 55e5b97f003e ("can: mcp25xxfd: add driver for Microchip MCP25xxFD SPI CAN") Link: https://lore.kernel.org/all/20220319153128.2164120-1-trix@redhat.com Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17 |
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60a848c5 |
| 16-Feb-2021 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: add RX IRQ coalescing support
This patch adds RX IRQ coalescing support to the driver.
The mcp251xfd chip doesn't support proper hardware based coalescing, so this patch tries to im
can: mcp251xfd: add RX IRQ coalescing support
This patch adds RX IRQ coalescing support to the driver.
The mcp251xfd chip doesn't support proper hardware based coalescing, so this patch tries to implemented it in software. The RX-FIFO offers a "FIFO not empty" interrupt, which is used if no coalescing is active.
With activated RX IRQ coalescing the "FIFO not empty" interrupt is disabled in the RX IRQ handler and the "FIFO half full" or "FIFO full interrupt" (depending on RX max coalesced frames IRQ) is used instead. To avoid RX CAN frame starvation a hrtimer is setup with RX coalesce usecs IRQ,on timer expiration the "FIFO not empty" is enabled again.
Support for ethtool configuration is added in the next patch.
Link: https://lore.kernel.org/20220313083640.501791-9-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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d86ba8db |
| 25-Oct-2021 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: ethtool: add support
This patch adds basic ethtool support (to query the current and maximum ring parameters) to the driver.
Link: https://lore.kernel.org/20220313083640.501791-5-mk
can: mcp251xfd: ethtool: add support
This patch adds basic ethtool support (to query the current and maximum ring parameters) to the driver.
Link: https://lore.kernel.org/20220313083640.501791-5-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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#
887e359d |
| 10-Oct-2021 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: prepare for multiple RX-FIFOs
This patch prepares the driver to use more than one RX-FIFO. Having a bigger RX buffer is beneficial in high load situations, where the system temporari
can: mcp251xfd: prepare for multiple RX-FIFOs
This patch prepares the driver to use more than one RX-FIFO. Having a bigger RX buffer is beneficial in high load situations, where the system temporarily cannot keep up reading CAN frames from the chip. Using a bigger RX buffer also allows to implement RX IRQ coalescing, which will be added in a later patch series.
If using more than 1 RX-FIFO the driver has to figure out, which FIFOs have RX'ed CAN frames pending. This is indicated by a set bit in the RXIF register, which is positioned directly after the interrupt status register INT. If more than 1 RX-FIFO is used, the driver reads both registers in 1 transfer.
The mcp251xfd_handle_rxif() function iterates over all RX rings and reads out the RX'ed CAN frames for for all pending FIFOs. To keep the logic for the 1 RX-FIFO only case in mcp251xfd_handle_rxif() simple, the driver marks that FIFO pending in mcp251xfd_ring_init().
The chip has a dedicated RX interrupt line to signal pending RX'ed frames. If connected to an input GPIO and the driver will skip the initial read of the interrupt status register (INT) and directly read the pending RX'ed frames if the line is active. The driver assumes the 1st RX-FIFO pending (a read of the RXIF register would re-introduce the skipped initial read of the INT register). Any other pending RX-FIFO will be served in the main interrupt handler.
Link: https://lore.kernel.org/all/20220217103826.2299157-8-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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fa0b68df |
| 03-Aug-2021 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: ring: mcp251xfd_ring_init(): checked RAM usage of ring setup
With this patch the usage of the on-chip RAM is checked. In the current driver the FIFO setup is fixed and always fits in
can: mcp251xfd: ring: mcp251xfd_ring_init(): checked RAM usage of ring setup
With this patch the usage of the on-chip RAM is checked. In the current driver the FIFO setup is fixed and always fits into the RAM.
With an upcoming patch series the ring and FIFO setup will be more dynamic. Although using more RAM than available should not happen, but add this safety check, just in case.
Link: https://lore.kernel.org/all/20220217103826.2299157-6-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Revision tags: v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16 |
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2a68dd86 |
| 16-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: add support for internal PLL
The PLL is enabled if the configured clock is less than or equal to 10 times the max clock frequency.
The device will operate with two different SPI spe
can: mcp251xfd: add support for internal PLL
The PLL is enabled if the configured clock is less than or equal to 10 times the max clock frequency.
The device will operate with two different SPI speeds. A slow speed determined by the clock without the PLL enabled, and a fast speed derived from the frequency with the PLL enabled.
Link: https://lore.kernel.org/all/20220207131047.282110-16-mkl@pengutronix.de Link: https://lore.kernel.org/all/20201015124401.2766-3-mas@csselectronics.com Co-developed-by: Magnus Aagaard Sørensen <mas@csselectronics.com> Signed-off-by: Magnus Aagaard Sørensen <mas@csselectronics.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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#
445dd72a |
| 19-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_register(): prepare to activate PLL after softreset
If the PLL is needed it must be switched on after chip reset. This patch adds the required call to mcp251xfd_register().
can: mcp251xfd: mcp251xfd_register(): prepare to activate PLL after softreset
If the PLL is needed it must be switched on after chip reset. This patch adds the required call to mcp251xfd_register().
Link: https://lore.kernel.org/all/20220207131047.282110-15-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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#
e39ea136 |
| 19-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_clock_init(): prepare for PLL support, wait for OSC ready
This patch prepares the mcp251xfd_chip_clock_init() function for PLL support.
If the PLL is needed is must b
can: mcp251xfd: mcp251xfd_chip_clock_init(): prepare for PLL support, wait for OSC ready
This patch prepares the mcp251xfd_chip_clock_init() function for PLL support.
If the PLL is needed is must be switched on after chip reset. This should be done in the mcp251xfd_chip_clock_init() function. Prepare this function to wait for the OSC and PLL to be ready.
Link: https://lore.kernel.org/all/20220207131047.282110-14-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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#
a10fd91e |
| 21-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: __mcp251xfd_chip_set_mode(): prepare for PLL support: improve error handling and diagnostics
This patch prepares the __mcp251xfd_chip_set_mode() function for PLL support by adding mo
can: mcp251xfd: __mcp251xfd_chip_set_mode(): prepare for PLL support: improve error handling and diagnostics
This patch prepares the __mcp251xfd_chip_set_mode() function for PLL support by adding more error checks and diagnostics.
Link: https://lore.kernel.org/all/20220207131047.282110-13-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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1a4abba6 |
| 16-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_wake(): renamed from mcp251xfd_chip_clock_enable()
This patch renames mcp251xfd_chip_clock_enable() into mcp251xfd_chip_wake() as this function actually wakes the chip
can: mcp251xfd: mcp251xfd_chip_wake(): renamed from mcp251xfd_chip_clock_enable()
This patch renames mcp251xfd_chip_clock_enable() into mcp251xfd_chip_wake() as this function actually wakes the chip. Additionally the documentation is adopted.
Link: https://lore.kernel.org/all/20220207131047.282110-12-mkl@pengutronix.de Co-developed-by: Magnus Aagaard Sørensen <mas@csselectronics.com> Signed-off-by: Magnus Aagaard Sørensen <mas@csselectronics.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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14193ea2 |
| 16-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_timestamp_init(): factor out into separate function
This patch factors out the timestamp initialization from the clock initialization.
This is a preparation patch for
can: mcp251xfd: mcp251xfd_chip_timestamp_init(): factor out into separate function
This patch factors out the timestamp initialization from the clock initialization.
This is a preparation patch for the PLL support, where clock and timestamp init must be done separately.
Link: https://lore.kernel.org/all/20220207131047.282110-11-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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01a80d68 |
| 27-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_softreset_check(): wait for OSC ready before accessing chip
This patch changes the order of reading the Mode and Oscillator Ready bits.
Instead of reading the Mode of
can: mcp251xfd: mcp251xfd_chip_softreset_check(): wait for OSC ready before accessing chip
This patch changes the order of reading the Mode and Oscillator Ready bits.
Instead of reading the Mode of the chip directly after reset, first wait for the oscillator to get ready and the chip to fully start up. Read the Mode after this.
Link: https://lore.kernel.org/all/20220207131047.282110-10-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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06db5dbc |
| 22-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_wait_for_osc_ready(): prepare for PLL support
The function mcp251xfd_chip_wait_for_osc_ready() polls the Oscillator Control Register for the oscillator to get ready. B
can: mcp251xfd: mcp251xfd_chip_wait_for_osc_ready(): prepare for PLL support
The function mcp251xfd_chip_wait_for_osc_ready() polls the Oscillator Control Register for the oscillator to get ready. By passing the appropriate parameters (osc_reference and osc_mask) it can also poll for PLL ready.
This patch adjusts the error message if the Oscillator and/or PLL fail to get ready.
Link: https://lore.kernel.org/all/20220207131047.282110-9-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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197656de |
| 22-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_wait_for_osc_ready(): improve chip detection and error handling
The function mcp251xfd_chip_wait_for_osc_ready() polls the Oscillator Control Register for the oscillat
can: mcp251xfd: mcp251xfd_chip_wait_for_osc_ready(): improve chip detection and error handling
The function mcp251xfd_chip_wait_for_osc_ready() polls the Oscillator Control Register for the oscillator to get ready.
This is the first register the driver reads from. Reading implausible values (all bits set or unset) can be caused by the chip starting up after power on, waking up after sleep, or by the chip not being preset at all. Add check for implausible register content mcp251xfd_reg_invalid() to the regmap_read_poll_timeout() loop.
In case of a regmap_read_poll_timeout() returns a fatal error (and not a timeout), forward it to the caller.
As mcp251xfd_chip_wait_for_osc_ready() will be called after the probe function has finished, (currently during ifup), move error message about failed chip detection from there into the probe function.
Link: https://lore.kernel.org/all/20220207131047.282110-8-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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0445e5ff |
| 20-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_wait_for_osc_ready(): factor out into separate function
This patch factors out mcp251xfd_chip_wait_for_osc_ready() into a separate function, it will be used in several
can: mcp251xfd: mcp251xfd_chip_wait_for_osc_ready(): factor out into separate function
This patch factors out mcp251xfd_chip_wait_for_osc_ready() into a separate function, it will be used in several places in the next patches.
Link: https://lore.kernel.org/all/20220207131047.282110-7-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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13c54a1e |
| 23-Oct-2020 |
Marc Kleine-Budde <mkl@pengutronix.de> |
can: mcp251xfd: mcp251xfd_chip_stop(): convert to a void function
The mcp251xfd_chip_stop() function tries the best to stop the chip and put it into sleep mode. It continues, even if some intermedia
can: mcp251xfd: mcp251xfd_chip_stop(): convert to a void function
The mcp251xfd_chip_stop() function tries the best to stop the chip and put it into sleep mode. It continues, even if some intermediate steps fail. As none of the callers use the return value, let this function return void.
Link: https://lore.kernel.org/all/20220207131047.282110-6-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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