159603d02SIcenowy Zheng/* 259603d02SIcenowy Zheng * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> 359603d02SIcenowy Zheng * 459603d02SIcenowy Zheng * Based on sun8i-h3-orangepi-one.dts, which is: 559603d02SIcenowy Zheng * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com> 659603d02SIcenowy Zheng * 759603d02SIcenowy Zheng * This file is dual-licensed: you can use it either under the terms 859603d02SIcenowy Zheng * of the GPL or the X11 license, at your option. Note that this dual 959603d02SIcenowy Zheng * licensing only applies to this file, and not this project as a 1059603d02SIcenowy Zheng * whole. 1159603d02SIcenowy Zheng * 1259603d02SIcenowy Zheng * a) This file is free software; you can redistribute it and/or 1359603d02SIcenowy Zheng * modify it under the terms of the GNU General Public License as 1459603d02SIcenowy Zheng * published by the Free Software Foundation; either version 2 of the 1559603d02SIcenowy Zheng * License, or (at your option) any later version. 1659603d02SIcenowy Zheng * 1759603d02SIcenowy Zheng * This file is distributed in the hope that it will be useful, 1859603d02SIcenowy Zheng * but WITHOUT ANY WARRANTY; without even the implied warranty of 1959603d02SIcenowy Zheng * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2059603d02SIcenowy Zheng * GNU General Public License for more details. 2159603d02SIcenowy Zheng * 2259603d02SIcenowy Zheng * Or, alternatively, 2359603d02SIcenowy Zheng * 2459603d02SIcenowy Zheng * b) Permission is hereby granted, free of charge, to any person 2559603d02SIcenowy Zheng * obtaining a copy of this software and associated documentation 2659603d02SIcenowy Zheng * files (the "Software"), to deal in the Software without 2759603d02SIcenowy Zheng * restriction, including without limitation the rights to use, 2859603d02SIcenowy Zheng * copy, modify, merge, publish, distribute, sublicense, and/or 2959603d02SIcenowy Zheng * sell copies of the Software, and to permit persons to whom the 3059603d02SIcenowy Zheng * Software is furnished to do so, subject to the following 3159603d02SIcenowy Zheng * conditions: 3259603d02SIcenowy Zheng * 3359603d02SIcenowy Zheng * The above copyright notice and this permission notice shall be 3459603d02SIcenowy Zheng * included in all copies or substantial portions of the Software. 3559603d02SIcenowy Zheng * 3659603d02SIcenowy Zheng * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 3759603d02SIcenowy Zheng * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 3859603d02SIcenowy Zheng * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 3959603d02SIcenowy Zheng * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 4059603d02SIcenowy Zheng * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 4159603d02SIcenowy Zheng * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 4259603d02SIcenowy Zheng * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 4359603d02SIcenowy Zheng * OTHER DEALINGS IN THE SOFTWARE. 4459603d02SIcenowy Zheng */ 4559603d02SIcenowy Zheng 4659603d02SIcenowy Zheng/dts-v1/; 4759603d02SIcenowy Zheng#include "sun8i-h3.dtsi" 4859603d02SIcenowy Zheng#include "sunxi-common-regulators.dtsi" 4959603d02SIcenowy Zheng 5059603d02SIcenowy Zheng#include <dt-bindings/gpio/gpio.h> 5159603d02SIcenowy Zheng#include <dt-bindings/input/input.h> 5259603d02SIcenowy Zheng 5359603d02SIcenowy Zheng/ { 5459603d02SIcenowy Zheng model = "Xunlong Orange Pi Zero"; 5559603d02SIcenowy Zheng compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus"; 5659603d02SIcenowy Zheng 5759603d02SIcenowy Zheng aliases { 5859603d02SIcenowy Zheng serial0 = &uart0; 5959603d02SIcenowy Zheng /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ 60*2d0c3d6bSAndre Przywara ethernet0 = &emac; 6159603d02SIcenowy Zheng ethernet1 = &xr819; 6259603d02SIcenowy Zheng }; 6359603d02SIcenowy Zheng 6459603d02SIcenowy Zheng chosen { 6559603d02SIcenowy Zheng stdout-path = "serial0:115200n8"; 6659603d02SIcenowy Zheng }; 6759603d02SIcenowy Zheng 6859603d02SIcenowy Zheng leds { 6959603d02SIcenowy Zheng compatible = "gpio-leds"; 7059603d02SIcenowy Zheng 7159603d02SIcenowy Zheng pwr_led { 7259603d02SIcenowy Zheng label = "orangepi:green:pwr"; 7359603d02SIcenowy Zheng gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; 7459603d02SIcenowy Zheng default-state = "on"; 7559603d02SIcenowy Zheng }; 7659603d02SIcenowy Zheng 7759603d02SIcenowy Zheng status_led { 7859603d02SIcenowy Zheng label = "orangepi:red:status"; 7959603d02SIcenowy Zheng gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; 8059603d02SIcenowy Zheng }; 8159603d02SIcenowy Zheng }; 8259603d02SIcenowy Zheng 8359603d02SIcenowy Zheng reg_vcc_wifi: reg_vcc_wifi { 8459603d02SIcenowy Zheng compatible = "regulator-fixed"; 8559603d02SIcenowy Zheng regulator-min-microvolt = <3300000>; 8659603d02SIcenowy Zheng regulator-max-microvolt = <3300000>; 8759603d02SIcenowy Zheng regulator-name = "vcc-wifi"; 8859603d02SIcenowy Zheng enable-active-high; 8959603d02SIcenowy Zheng gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>; 9059603d02SIcenowy Zheng }; 9159603d02SIcenowy Zheng 9259603d02SIcenowy Zheng wifi_pwrseq: wifi_pwrseq { 9359603d02SIcenowy Zheng compatible = "mmc-pwrseq-simple"; 9459603d02SIcenowy Zheng reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; 95*2d0c3d6bSAndre Przywara post-power-on-delay-ms = <200>; 9659603d02SIcenowy Zheng }; 9759603d02SIcenowy Zheng}; 9859603d02SIcenowy Zheng 99*2d0c3d6bSAndre Przywara&ehci0 { 100*2d0c3d6bSAndre Przywara status = "okay"; 101*2d0c3d6bSAndre Przywara}; 102*2d0c3d6bSAndre Przywara 10359603d02SIcenowy Zheng&ehci1 { 10459603d02SIcenowy Zheng status = "okay"; 10559603d02SIcenowy Zheng}; 10659603d02SIcenowy Zheng 1078b15f8ebSAndre Przywara&emac { 108e88d2a57SAndre Przywara phy-handle = <&int_mii_phy>; 1098b15f8ebSAndre Przywara phy-mode = "mii"; 1108b15f8ebSAndre Przywara allwinner,leds-active-low; 1118b15f8ebSAndre Przywara status = "okay"; 1128b15f8ebSAndre Przywara}; 1138b15f8ebSAndre Przywara 11459603d02SIcenowy Zheng&mmc0 { 11559603d02SIcenowy Zheng vmmc-supply = <®_vcc3v3>; 11659603d02SIcenowy Zheng bus-width = <4>; 117*2d0c3d6bSAndre Przywara cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 11859603d02SIcenowy Zheng status = "okay"; 11959603d02SIcenowy Zheng}; 12059603d02SIcenowy Zheng 12159603d02SIcenowy Zheng&mmc1 { 12259603d02SIcenowy Zheng vmmc-supply = <®_vcc_wifi>; 12359603d02SIcenowy Zheng mmc-pwrseq = <&wifi_pwrseq>; 12459603d02SIcenowy Zheng bus-width = <4>; 12559603d02SIcenowy Zheng non-removable; 12659603d02SIcenowy Zheng status = "okay"; 12759603d02SIcenowy Zheng 12859603d02SIcenowy Zheng /* 12959603d02SIcenowy Zheng * Explicitly define the sdio device, so that we can add an ethernet 13059603d02SIcenowy Zheng * alias for it (which e.g. makes u-boot set a mac-address). 13159603d02SIcenowy Zheng */ 13259603d02SIcenowy Zheng xr819: sdio_wifi@1 { 13359603d02SIcenowy Zheng reg = <1>; 13459603d02SIcenowy Zheng }; 13559603d02SIcenowy Zheng}; 13659603d02SIcenowy Zheng 137*2d0c3d6bSAndre Przywara&ohci0 { 138*2d0c3d6bSAndre Przywara status = "okay"; 139*2d0c3d6bSAndre Przywara}; 140*2d0c3d6bSAndre Przywara 14159603d02SIcenowy Zheng&ohci1 { 14259603d02SIcenowy Zheng status = "okay"; 14359603d02SIcenowy Zheng}; 14459603d02SIcenowy Zheng 145*2d0c3d6bSAndre Przywara&spi0 { 146*2d0c3d6bSAndre Przywara /* Disable SPI NOR by default: it optional on Orange Pi Zero boards */ 147*2d0c3d6bSAndre Przywara status = "disabled"; 148*2d0c3d6bSAndre Przywara 149*2d0c3d6bSAndre Przywara flash@0 { 150*2d0c3d6bSAndre Przywara #address-cells = <1>; 151*2d0c3d6bSAndre Przywara #size-cells = <1>; 152*2d0c3d6bSAndre Przywara compatible = "mxicy,mx25l1606e", "winbond,w25q128"; 153*2d0c3d6bSAndre Przywara reg = <0>; 154*2d0c3d6bSAndre Przywara spi-max-frequency = <40000000>; 155*2d0c3d6bSAndre Przywara }; 156*2d0c3d6bSAndre Przywara}; 157*2d0c3d6bSAndre Przywara 15859603d02SIcenowy Zheng&uart0 { 15959603d02SIcenowy Zheng pinctrl-names = "default"; 16059603d02SIcenowy Zheng pinctrl-0 = <&uart0_pins_a>; 16159603d02SIcenowy Zheng status = "okay"; 16259603d02SIcenowy Zheng}; 16359603d02SIcenowy Zheng 164*2d0c3d6bSAndre Przywara&uart1 { 165*2d0c3d6bSAndre Przywara pinctrl-names = "default"; 166*2d0c3d6bSAndre Przywara pinctrl-0 = <&uart1_pins>; 167*2d0c3d6bSAndre Przywara status = "disabled"; 168*2d0c3d6bSAndre Przywara}; 169*2d0c3d6bSAndre Przywara 170*2d0c3d6bSAndre Przywara&uart2 { 171*2d0c3d6bSAndre Przywara pinctrl-names = "default"; 172*2d0c3d6bSAndre Przywara pinctrl-0 = <&uart2_pins>; 173*2d0c3d6bSAndre Przywara status = "disabled"; 174*2d0c3d6bSAndre Przywara}; 175*2d0c3d6bSAndre Przywara 176*2d0c3d6bSAndre Przywara&usb_otg { 177*2d0c3d6bSAndre Przywara dr_mode = "peripheral"; 17859603d02SIcenowy Zheng status = "okay"; 17959603d02SIcenowy Zheng}; 180*2d0c3d6bSAndre Przywara 181*2d0c3d6bSAndre Przywara&usbphy { 182*2d0c3d6bSAndre Przywara /* 183*2d0c3d6bSAndre Przywara * USB Type-A port VBUS is always on. However, MicroUSB VBUS can only 184*2d0c3d6bSAndre Przywara * power up the board; when it's used as OTG port, this VBUS is 185*2d0c3d6bSAndre Przywara * always off even if the board is powered via GPIO pins. 186*2d0c3d6bSAndre Przywara */ 187*2d0c3d6bSAndre Przywara status = "okay"; 188*2d0c3d6bSAndre Przywara usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ 189*2d0c3d6bSAndre Przywara}; 190