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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
10 title: STMicroelectronics STM32 USART
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
32 description: label associated with this uart
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstm32f429.dtsi2 * Copyright (C) 2015, STMicroelectronics - All Rights Reserved
3 * Author(s): Maxime Coquelin <mcoquelin.stm32@gmail.com> for STMicroelectronics.
5 * This file is dual-licensed: you can use it either under the terms
45 #include "armv7-m.dtsi"
46 #include <dt-bindings/clock/stm32fx-clock.h>
47 #include <dt-bindings/mfd/stm32f4-rcc.h>
51 clk_hse: clk-hse {
52 #clock-cells = <0>;
53 compatible = "fixed-clock";
54 clock-frequency = <0>;
[all …]
H A Dstm32mp157c.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
44 #include "armv7-m.dtsi"
45 #include <dt-bindings/clock/stm32h7-clks.h>
46 #include <dt-bindings/mfd/stm32h7-rcc.h>
50 clk_hse: clk-hse {
51 #clock-cells = <0>;
52 compatible = "fixed-clock";
53 clock-frequency = <25000000>;
56 clk_lse: clk-lse {
[all …]
H A Dstm32f746.dtsi2 * Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
3 * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
7 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
9 * This file is dual-licensed: you can use it either under the terms
48 #include "armv7-m.dtsi"
49 #include <dt-bindings/pinctrl/stm32f746-pinfunc.h>
50 #include <dt-bindings/clock/stm32fx-clock.h>
51 #include <dt-bindings/mfd/stm32f7-rcc.h>
55 clk_hse: clk-hse {
56 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
[all …]
H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
[all …]
H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
[all …]
H A Dstm32mp15xx-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
20 * GPIO line, however the STM32 UART driver assumes RX happens
24 rs485-rx-en-hog {
25 gpio-hog;
27 output-low;
28 line-name = "rs485-rx-en";
33 gpio-line-names = "", "", "", "",
34 "", "", "DHCOM-B", "",
[all …]
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
/openbmc/u-boot/board/st/stm32mp1/
H A DREADME1 SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 # Copyright (C) 2018 STMicroelectronics - All Rights Reserved
6 U-Boot on STMicroelectronics STM32MP1
15 U-Boot supports one STMP32MP1 SoCs: STM32MP157
17 The STM32MP157 is a Cortex-A MPU aimed at various applications.
19 - Dual core Cortex-A7 application core
20 - 2D/3D image composition with GPU
21 - Standard memories interface support
22 - Standard connectivity, widely inherited from the STM32 MCU family
23 - Comprehensive security support
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA Controller
10 The STM32 DMA is a general-purpose direct memory access controller capable of
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
[all …]
/openbmc/u-boot/drivers/serial/
H A Dserial_stm32.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
14 #include <asm/arch/stm32.h>
22 bool stm32f4 = uart_info->stm32f4; in _stm32_serial_setbrg()
45 _stm32_serial_setbrg(plat->base, plat->uart_info, in stm32_serial_setbrg()
46 plat->clock_rate, baudrate); in stm32_serial_setbrg()
54 bool stm32f4 = plat->uart_info->stm32f4; in stm32_serial_setconfig()
55 u8 uart_enable_bit = plat->uart_info->uart_enable_bit; in stm32_serial_setconfig()
56 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig()
68 return -ENOTSUPP; /* not supported in driver*/ in stm32_serial_setconfig()
[all …]
H A DKconfig11 Select a default baudrate, where "default" has a driver-specific
12 meaning of either setting the baudrate for the early debug UART
19 # non-dm serial code
32 In various cases, we need to specify which of the UART devices that
34 in U-Boot.
41 In very space-constrained devices even the full UART driver is too
42 large. In this case the debug UART can still be used in some cases.
43 This option enables the full UART in U-Boot, so if is it disabled,
44 the full UART driver will be omitted, thus saving space.
51 In very space-constrained devices even the full UART driver is too
[all …]
/openbmc/linux/include/uapi/linux/
H A Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
34 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
35 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
36 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
37 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
38 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
39 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
43 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
[all …]
/openbmc/u-boot/drivers/misc/
H A DKconfig50 bool "Rockchip e-fuse support"
53 Enable (read-only) access for the e-fuse block found in Rockchip
55 or through child-nodes that are generated based on the e-fuse map
74 Enable command-line access to the Chrome OS EC (Embedded
76 a number of sub-commands for performing EC tasks such as
112 keyboard (use the -l flag to enable the LCD), verified boot context,
121 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
129 integrated 64-byte EEPROM, four programmable non-volatile I/O pins
159 disable the legacy UART, the watchdog or other devices
163 bool "Enable power-sequencing drivers"
[all …]
/openbmc/linux/drivers/tty/serial/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_SERIAL_CORE) += serial_base.o
7 serial_base-y := serial_core.o serial_base_bus.o serial_ctrl.o serial_port.o
9 obj-$(CONFIG_SERIAL_EARLYCON) += earlycon.o
10 obj-$(CONFIG_SERIAL_EARLYCON_SEMIHOST) += earlycon-semihost.o
11 obj-$(CONFIG_SERIAL_EARLYCON_RISCV_SBI) += earlycon-riscv-sbi.o
16 obj-$(CONFIG_SERIAL_SUNCORE) += suncore.o
17 obj-$(CONFIG_SERIAL_SUNHV) += sunhv.o
18 obj-$(CONFIG_SERIAL_SUNZILOG) += sunzilog.o
19 obj-$(CONFIG_SERIAL_SUNSU) += sunsu.o
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
19 comment "Non-8250 serial port support"
26 This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
37 Say Y here if you wish to use an AMBA PrimeCell UART as the system
53 This selects the ARM(R) AMBA(R) PrimeCell PL011 UART. If you have
65 Say Y here if you wish to use an AMBA PrimeCell UART as the system
89 bool "Early console using RISC-V SBI"
95 Support for early debug console using RISC-V SBI. This enables
101 tristate "BCM1xxx on-chip DUART serial support"
107 the BCM1250 and derived System-On-a-Chip (SOC) devices. Note that
[all …]
H A Dstm32-usart.c1 // SPDX-License-Identifier: GPL-2.0
5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com>
9 * Inspired by st-asc.c from STMicroelectronics (c)
15 #include <linux/dma-direction.h>
17 #include <linux/dma-mapping.h>
36 #include "stm32-usart.h"
120 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits()
122 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits()
129 val = readl_relaxed(port->membase + reg); in stm32_usart_clr_bits()
131 writel_relaxed(val, port->membase + reg); in stm32_usart_clr_bits()
[all …]
/openbmc/linux/drivers/dma/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
112 tristate "Analog Devices AXI-DMAC DMA support"
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
154 tristate "SA-11x0 DMA support"
159 Support the DMA engine found on Intel StrongARM SA-1100 and
160 SA-1110 SoCs. This DMA engine can only be used with on-chip
220 This module can be found on Freescale Vybrid and LS-1 SoCs.
263 Enable support for the IMG multi-threaded DMA controller (MDC).
283 tristate "Intel integrated DMA 64-bit support"
319 accel-config) to continue function. It is expected that accel-config
[all …]
H A Dstm32-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for STM32 DMA controller
5 * Inspired by dma-jz4740.c and tegra20-apb-dma.c
9 * Pierre-Yves Mordret <pierre-yves.mordret@st.com>
16 #include <linux/dma-mapping.h>
32 #include "virt-dma.h"
50 * If (chan->id % 4) is 2 or 3, left shift the mask by 16 bits;
65 #define STM32_DMA_SCR_TRBUFF BIT(20) /* Bufferable transfer for USART/UART */
159 * struct stm32_dma_cfg - STM32 DMA custom configuration
198 * struct stm32_dma_mdma_config - STM32 DMA MDMA configuration
[all …]
/openbmc/u-boot/arch/arm/mach-rockchip/rk3368/
H A DKconfig7 bool "Theobroma Systems RK3368-uQ7 (Lion) module"
9 The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm,
10 MXM-230 connector) system-on-module designed by Theobroma
14 - 8x Cortex-A53 (in 2 clusters of 4 cores each)
15 - (on-module) up to 4GB of DDR3 memory
16 - (on-module) SPI-NOR flash
17 - (on-module) eMMC
18 - Gigabit Ethernet (with an on-module KSZ9031 PHY)
19 - USB
20 - HDMI
[all …]
/openbmc/linux/arch/arm/
H A DKconfig.debug1 # SPDX-License-Identifier: GPL-2.0
44 once the kernel has booted up - it's a one time check.
107 1 - undefined instruction events
108 2 - system calls
109 4 - invalid data aborts
110 8 - SIGSEGV faults
111 16 - SIGBUS faults
115 bool "Kernel low-level debugging functions (read help!)"
123 UART definition, as specified below. Attempting to boot the kernel
128 prompt "Kernel low-level debugging port"
[all …]

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