10b11dbf7SMasahiro Yamada# 20b11dbf7SMasahiro Yamada# Multifunction miscellaneous devices 30b11dbf7SMasahiro Yamada# 40b11dbf7SMasahiro Yamada 50b11dbf7SMasahiro Yamadamenu "Multifunction device drivers" 60b11dbf7SMasahiro Yamada 74395e06eSThomas Chouconfig MISC 84395e06eSThomas Chou bool "Enable Driver Model for Misc drivers" 94395e06eSThomas Chou depends on DM 104395e06eSThomas Chou help 114395e06eSThomas Chou Enable driver model for miscellaneous devices. This class is 124395e06eSThomas Chou used only for those do not fit other more general classes. A 134395e06eSThomas Chou set of generic read, write and ioctl methods may be used to 144395e06eSThomas Chou access the device. 154395e06eSThomas Chou 16979d74d9Sryan_chenconfig ASPEED_AHBC 17979d74d9Sryan_chen bool "Aspeed AHBC support" 18979d74d9Sryan_chen depends on ARCH_ASPEED 19979d74d9Sryan_chen help 20979d74d9Sryan_chen Select this to enable ahbc driver for Aspeed SoC. 21979d74d9Sryan_chen 22*9450faf4Sryan_chenconfig ASPEED_DP 23*9450faf4Sryan_chen bool "Aspeed Display Port firmware driver" 24*9450faf4Sryan_chen depends on ARCH_ASPEED 25*9450faf4Sryan_chen help 26*9450faf4Sryan_chen Select this to enable Diplay Port firmware driver 27*9450faf4Sryan_chen 28460fdfe6Sryan_chenconfig ASPEED_FSI 29460fdfe6Sryan_chen bool "Enable ASPEED FSI driver" 30460fdfe6Sryan_chen depends on ARCH_ASPEED 31460fdfe6Sryan_chen help 32460fdfe6Sryan_chen Support the FSI master present in the ASPEED system on chips. 33460fdfe6Sryan_chen 34ca844dd8SThomas Chouconfig ALTERA_SYSID 35ca844dd8SThomas Chou bool "Altera Sysid support" 36ca844dd8SThomas Chou depends on MISC 37ca844dd8SThomas Chou help 38ca844dd8SThomas Chou Select this to enable a sysid for Altera devices. Please find 39ca844dd8SThomas Chou details on the "Embedded Peripherals IP User Guide" of Altera. 40ca844dd8SThomas Chou 41aa5eb9a3SMarek Behúnconfig ATSHA204A 42aa5eb9a3SMarek Behún bool "Support for Atmel ATSHA204A module" 43aa5eb9a3SMarek Behún depends on MISC 44aa5eb9a3SMarek Behún help 45aa5eb9a3SMarek Behún Enable support for I2C connected Atmel's ATSHA204A 46aa5eb9a3SMarek Behún CryptoAuthentication module found for example on the Turris Omnia 47aa5eb9a3SMarek Behún board. 48aa5eb9a3SMarek Behún 4949cd8e85SPhilipp Tomsichconfig ROCKCHIP_EFUSE 5049cd8e85SPhilipp Tomsich bool "Rockchip e-fuse support" 5149cd8e85SPhilipp Tomsich depends on MISC 5249cd8e85SPhilipp Tomsich help 5349cd8e85SPhilipp Tomsich Enable (read-only) access for the e-fuse block found in Rockchip 5449cd8e85SPhilipp Tomsich SoCs: accesses can either be made using byte addressing and a length 5549cd8e85SPhilipp Tomsich or through child-nodes that are generated based on the e-fuse map 5649cd8e85SPhilipp Tomsich retrieved from the DTS. 5749cd8e85SPhilipp Tomsich 5849cd8e85SPhilipp Tomsich This driver currently supports the RK3399 only, but can easily be 5949cd8e85SPhilipp Tomsich extended (by porting the read function from the Linux kernel sources) 6049cd8e85SPhilipp Tomsich to support other recent Rockchip devices. 6149cd8e85SPhilipp Tomsich 620fabfeb2SLiviu Dudauconfig VEXPRESS_CONFIG 630fabfeb2SLiviu Dudau bool "Enable support for Arm Versatile Express config bus" 640fabfeb2SLiviu Dudau depends on MISC 650fabfeb2SLiviu Dudau help 660fabfeb2SLiviu Dudau If you say Y here, you will get support for accessing the 670fabfeb2SLiviu Dudau configuration bus on the Arm Versatile Express boards via 680fabfeb2SLiviu Dudau a sysreg driver. 690fabfeb2SLiviu Dudau 706fb9ac15SSimon Glassconfig CMD_CROS_EC 716fb9ac15SSimon Glass bool "Enable crosec command" 726fb9ac15SSimon Glass depends on CROS_EC 736fb9ac15SSimon Glass help 746fb9ac15SSimon Glass Enable command-line access to the Chrome OS EC (Embedded 756fb9ac15SSimon Glass Controller). This provides the 'crosec' command which has 766fb9ac15SSimon Glass a number of sub-commands for performing EC tasks such as 776fb9ac15SSimon Glass updating its flash, accessing a small saved context area 786fb9ac15SSimon Glass and talking to the I2C bus behind the EC (if there is one). 796fb9ac15SSimon Glass 806fb9ac15SSimon Glassconfig CROS_EC 816fb9ac15SSimon Glass bool "Enable Chrome OS EC" 826fb9ac15SSimon Glass help 836fb9ac15SSimon Glass Enable access to the Chrome OS EC. This is a separate 846fb9ac15SSimon Glass microcontroller typically available on a SPI bus on Chromebooks. It 856fb9ac15SSimon Glass provides access to the keyboard, some internal storage and may 866fb9ac15SSimon Glass control access to the battery and main PMIC depending on the 876fb9ac15SSimon Glass device. You can use the 'crosec' command to access it. 886fb9ac15SSimon Glass 896fb9ac15SSimon Glassconfig CROS_EC_I2C 906fb9ac15SSimon Glass bool "Enable Chrome OS EC I2C driver" 916fb9ac15SSimon Glass depends on CROS_EC 926fb9ac15SSimon Glass help 936fb9ac15SSimon Glass Enable I2C access to the Chrome OS EC. This is used on older 946fb9ac15SSimon Glass ARM Chromebooks such as snow and spring before the standard bus 956fb9ac15SSimon Glass changed to SPI. The EC will accept commands across the I2C using 966fb9ac15SSimon Glass a special message protocol, and provide responses. 976fb9ac15SSimon Glass 986fb9ac15SSimon Glassconfig CROS_EC_LPC 996fb9ac15SSimon Glass bool "Enable Chrome OS EC LPC driver" 1006fb9ac15SSimon Glass depends on CROS_EC 1016fb9ac15SSimon Glass help 1026fb9ac15SSimon Glass Enable I2C access to the Chrome OS EC. This is used on x86 1036fb9ac15SSimon Glass Chromebooks such as link and falco. The keyboard is provided 1046fb9ac15SSimon Glass through a legacy port interface, so on x86 machines the main 1056fb9ac15SSimon Glass function of the EC is power and thermal management. 1066fb9ac15SSimon Glass 10747cb8c65SSimon Glassconfig CROS_EC_SANDBOX 10847cb8c65SSimon Glass bool "Enable Chrome OS EC sandbox driver" 10947cb8c65SSimon Glass depends on CROS_EC && SANDBOX 11047cb8c65SSimon Glass help 11147cb8c65SSimon Glass Enable a sandbox emulation of the Chrome OS EC. This supports 11247cb8c65SSimon Glass keyboard (use the -l flag to enable the LCD), verified boot context, 11347cb8c65SSimon Glass EC flash read/write/erase support and a few other things. It is 11447cb8c65SSimon Glass enough to perform a Chrome OS verified boot on sandbox. 11547cb8c65SSimon Glass 1166fb9ac15SSimon Glassconfig CROS_EC_SPI 1176fb9ac15SSimon Glass bool "Enable Chrome OS EC SPI driver" 1186fb9ac15SSimon Glass depends on CROS_EC 1196fb9ac15SSimon Glass help 1206fb9ac15SSimon Glass Enable SPI access to the Chrome OS EC. This is used on newer 1216fb9ac15SSimon Glass ARM Chromebooks such as pit, pi and nyan-big. The SPI interface 1226fb9ac15SSimon Glass provides a faster and more robust interface than I2C but the bugs 1236fb9ac15SSimon Glass are less interesting. 1246fb9ac15SSimon Glass 125879704d8SSimon Glassconfig DS4510 126879704d8SSimon Glass bool "Enable support for DS4510 CPU supervisor" 127879704d8SSimon Glass help 128879704d8SSimon Glass Enable support for the Maxim DS4510 CPU supervisor. It has an 129879704d8SSimon Glass integrated 64-byte EEPROM, four programmable non-volatile I/O pins 130879704d8SSimon Glass and a configurable timer for the supervisor function. The device is 131879704d8SSimon Glass connected over I2C. 132879704d8SSimon Glass 133c12e0d93SPeng Fanconfig FSL_SEC_MON 134fe78378dSgaurav rana bool "Enable FSL SEC_MON Driver" 135fe78378dSgaurav rana help 136fe78378dSgaurav rana Freescale Security Monitor block is responsible for monitoring 137fe78378dSgaurav rana system states. 138fe78378dSgaurav rana Security Monitor can be transitioned on any security failures, 139fe78378dSgaurav rana like software violations or hardware security violations. 1401cdd9412SStefan Roese 141b5392c50SPaul Burtonconfig JZ4780_EFUSE 142b5392c50SPaul Burton bool "Ingenic JZ4780 eFUSE support" 143b5392c50SPaul Burton depends on ARCH_JZ47XX 144b5392c50SPaul Burton help 145b5392c50SPaul Burton This selects support for the eFUSE on Ingenic JZ4780 SoCs. 146b5392c50SPaul Burton 1473e020f03SPeng Fanconfig MXC_OCOTP 1483e020f03SPeng Fan bool "Enable MXC OCOTP Driver" 1493e020f03SPeng Fan help 1503e020f03SPeng Fan If you say Y here, you will get support for the One Time 1513e020f03SPeng Fan Programmable memory pages that are stored on the some 1523e020f03SPeng Fan Freescale i.MX processors. 1533e020f03SPeng Fan 1544cf9e464SStefan Roeseconfig NUVOTON_NCT6102D 1554cf9e464SStefan Roese bool "Enable Nuvoton NCT6102D Super I/O driver" 1564cf9e464SStefan Roese help 1574cf9e464SStefan Roese If you say Y here, you will get support for the Nuvoton 1584cf9e464SStefan Roese NCT6102D Super I/O driver. This can be used to enable or 1594cf9e464SStefan Roese disable the legacy UART, the watchdog or other devices 1604cf9e464SStefan Roese in the Nuvoton Super IO chips on X86 platforms. 1614cf9e464SStefan Roese 1625fd6badbSSimon Glassconfig PWRSEQ 1635fd6badbSSimon Glass bool "Enable power-sequencing drivers" 1645fd6badbSSimon Glass depends on DM 1655fd6badbSSimon Glass help 1665fd6badbSSimon Glass Power-sequencing drivers provide support for controlling power for 1675fd6badbSSimon Glass devices. They are typically referenced by a phandle from another 1685fd6badbSSimon Glass device. When the device is started up, its power sequence can be 1695fd6badbSSimon Glass initiated. 1705fd6badbSSimon Glass 1715fd6badbSSimon Glassconfig SPL_PWRSEQ 1725fd6badbSSimon Glass bool "Enable power-sequencing drivers for SPL" 1735fd6badbSSimon Glass depends on PWRSEQ 1745fd6badbSSimon Glass help 1755fd6badbSSimon Glass Power-sequencing drivers provide support for controlling power for 1765fd6badbSSimon Glass devices. They are typically referenced by a phandle from another 1775fd6badbSSimon Glass device. When the device is started up, its power sequence can be 1785fd6badbSSimon Glass initiated. 1795fd6badbSSimon Glass 1801cdd9412SStefan Roeseconfig PCA9551_LED 1811cdd9412SStefan Roese bool "Enable PCA9551 LED driver" 1821cdd9412SStefan Roese help 1831cdd9412SStefan Roese Enable driver for PCA9551 LED controller. This controller 1841cdd9412SStefan Roese is connected via I2C. So I2C needs to be enabled. 1851cdd9412SStefan Roese 1861cdd9412SStefan Roeseconfig PCA9551_I2C_ADDR 1871cdd9412SStefan Roese hex "I2C address of PCA9551 LED controller" 1881cdd9412SStefan Roese depends on PCA9551_LED 1891cdd9412SStefan Roese default 0x60 1901cdd9412SStefan Roese help 1911cdd9412SStefan Roese The I2C address of the PCA9551 LED controller. 192f9917454SSimon Glass 193c3600e1fSPatrick Delaunayconfig STM32MP_FUSE 194c3600e1fSPatrick Delaunay bool "Enable STM32MP fuse wrapper providing the fuse API" 195c3600e1fSPatrick Delaunay depends on ARCH_STM32MP && MISC 196c3600e1fSPatrick Delaunay default y if CMD_FUSE 197c3600e1fSPatrick Delaunay help 198c3600e1fSPatrick Delaunay If you say Y here, you will get support for the fuse API (OTP) 199c3600e1fSPatrick Delaunay for STM32MP architecture. 200c3600e1fSPatrick Delaunay This API is needed for CMD_FUSE. 201c3600e1fSPatrick Delaunay 2024e280b91SChristophe Kerelloconfig STM32_RCC 2034e280b91SChristophe Kerello bool "Enable RCC driver for the STM32 SoC's family" 204d090cbabSPatrick Delaunay depends on (STM32 || ARCH_STM32MP) && MISC 2054e280b91SChristophe Kerello help 2064e280b91SChristophe Kerello Enable the STM32 RCC driver. The RCC block (Reset and Clock Control 2074e280b91SChristophe Kerello block) is responsible of the management of the clock and reset 2084e280b91SChristophe Kerello generation. 2094e280b91SChristophe Kerello This driver is similar to an MFD driver in the Linux kernel. 2104e280b91SChristophe Kerello 211bd3ee84aSStephen Warrenconfig TEGRA_CAR 212bd3ee84aSStephen Warren bool "Enable support for the Tegra CAR driver" 213bd3ee84aSStephen Warren depends on TEGRA_NO_BPMP 214bd3ee84aSStephen Warren help 215bd3ee84aSStephen Warren The Tegra CAR (Clock and Reset Controller) is a HW module that 216bd3ee84aSStephen Warren controls almost all clocks and resets in a Tegra SoC. 217bd3ee84aSStephen Warren 21873dd5c4cSStephen Warrenconfig TEGRA186_BPMP 21973dd5c4cSStephen Warren bool "Enable support for the Tegra186 BPMP driver" 22073dd5c4cSStephen Warren depends on TEGRA186 22173dd5c4cSStephen Warren help 22273dd5c4cSStephen Warren The Tegra BPMP (Boot and Power Management Processor) is a separate 22373dd5c4cSStephen Warren auxiliary CPU embedded into Tegra to perform power management work, 22473dd5c4cSStephen Warren and controls related features such as clocks, resets, power domains, 22573dd5c4cSStephen Warren PMIC I2C bus, etc. This driver provides the core low-level 22673dd5c4cSStephen Warren communication path by which feature-specific drivers (such as clock) 22773dd5c4cSStephen Warren can make requests to the BPMP. This driver is similar to an MFD 22873dd5c4cSStephen Warren driver in the Linux kernel. 22973dd5c4cSStephen Warren 230cc3fedb2SAdam Fordconfig TWL4030_LED 231cc3fedb2SAdam Ford bool "Enable TWL4030 LED controller" 232cc3fedb2SAdam Ford help 233cc3fedb2SAdam Ford Enable this to add support for the TWL4030 LED controller. 234cc3fedb2SAdam Ford 23585056932SStefan Roeseconfig WINBOND_W83627 23685056932SStefan Roese bool "Enable Winbond Super I/O driver" 23785056932SStefan Roese help 23885056932SStefan Roese If you say Y here, you will get support for the Winbond 23985056932SStefan Roese W83627 Super I/O driver. This can be used to enable the 24085056932SStefan Roese legacy UART or other devices in the Winbond Super IO chips 24185056932SStefan Roese on X86 platforms. 24285056932SStefan Roese 243fcf5c041SMiao Yanconfig QFW 244fcf5c041SMiao Yan bool 245fcf5c041SMiao Yan help 246fcf5c041SMiao Yan Hidden option to enable QEMU fw_cfg interface. This will be selected by 24718686590SMiao Yan either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE. 248fcf5c041SMiao Yan 249d7e28918Smario.six@gdsys.ccconfig I2C_EEPROM 250d7e28918Smario.six@gdsys.cc bool "Enable driver for generic I2C-attached EEPROMs" 251d7e28918Smario.six@gdsys.cc depends on MISC 252d7e28918Smario.six@gdsys.cc help 253d7e28918Smario.six@gdsys.cc Enable a generic driver for EEPROMs attached via I2C. 254e3f24d4fSAdam Ford 255d81a1de9SWenyou Yang 256d81a1de9SWenyou Yangconfig SPL_I2C_EEPROM 257d81a1de9SWenyou Yang bool "Enable driver for generic I2C-attached EEPROMs for SPL" 258d81a1de9SWenyou Yang depends on MISC && SPL && SPL_DM 259d81a1de9SWenyou Yang help 260d81a1de9SWenyou Yang This option is an SPL-variant of the I2C_EEPROM option. 261d81a1de9SWenyou Yang See the help of I2C_EEPROM for details. 262d81a1de9SWenyou Yang 2635c32de20SVipul Kumarconfig ZYNQ_GEM_I2C_MAC_OFFSET 2645c32de20SVipul Kumar hex "Set the I2C MAC offset" 2655c32de20SVipul Kumar default 0x0 266027b1134SMichal Simek depends on DM_I2C 2675c32de20SVipul Kumar help 2685c32de20SVipul Kumar Set the MAC offset for i2C. 2695c32de20SVipul Kumar 270e3f24d4fSAdam Fordif I2C_EEPROM 271e3f24d4fSAdam Ford 272e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR 273e3f24d4fSAdam Ford hex "Chip address of the EEPROM device" 274e3f24d4fSAdam Ford default 0 275e3f24d4fSAdam Ford 276e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_BUS 277e3f24d4fSAdam Ford int "I2C bus of the EEPROM device." 278e3f24d4fSAdam Ford default 0 279e3f24d4fSAdam Ford 280e3f24d4fSAdam Fordconfig SYS_EEPROM_SIZE 281e3f24d4fSAdam Ford int "Size in bytes of the EEPROM device" 282e3f24d4fSAdam Ford default 256 283e3f24d4fSAdam Ford 284e3f24d4fSAdam Fordconfig SYS_EEPROM_PAGE_WRITE_BITS 285e3f24d4fSAdam Ford int "Number of bits used to address bytes in a single page" 286e3f24d4fSAdam Ford default 0 287e3f24d4fSAdam Ford help 288e3f24d4fSAdam Ford The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS. 289e3f24d4fSAdam Ford A 64 byte page, for example would require six bits. 290e3f24d4fSAdam Ford 291e3f24d4fSAdam Fordconfig SYS_EEPROM_PAGE_WRITE_DELAY_MS 292e3f24d4fSAdam Ford int "Number of milliseconds to delay between page writes" 293e3f24d4fSAdam Ford default 0 294e3f24d4fSAdam Ford 295e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR_LEN 296e3f24d4fSAdam Ford int "Length in bytes of the EEPROM memory array address" 297e3f24d4fSAdam Ford default 1 298e3f24d4fSAdam Ford help 299e3f24d4fSAdam Ford Note: This is NOT the chip address length! 300e3f24d4fSAdam Ford 301e3f24d4fSAdam Fordconfig SYS_I2C_EEPROM_ADDR_OVERFLOW 302e3f24d4fSAdam Ford hex "EEPROM Address Overflow" 303e3f24d4fSAdam Ford default 0 304e3f24d4fSAdam Ford help 305e3f24d4fSAdam Ford EEPROM chips that implement "address overflow" are ones 306e3f24d4fSAdam Ford like Catalyst 24WC04/08/16 which has 9/10/11 bits of 307e3f24d4fSAdam Ford address and the extra bits end up in the "chip address" bit 308e3f24d4fSAdam Ford slots. This makes a 24WC08 (1Kbyte) chip look like four 256 309e3f24d4fSAdam Ford byte chips. 310e3f24d4fSAdam Ford 311e3f24d4fSAdam Fordendif 312e3f24d4fSAdam Ford 31386da8c12SMario Sixconfig GDSYS_RXAUI_CTRL 31486da8c12SMario Six bool "Enable gdsys RXAUI control driver" 31586da8c12SMario Six depends on MISC 31686da8c12SMario Six help 31786da8c12SMario Six Support gdsys FPGA's RXAUI control. 3187e86242bSMario Six 3197e86242bSMario Sixconfig GDSYS_IOEP 3207e86242bSMario Six bool "Enable gdsys IOEP driver" 3217e86242bSMario Six depends on MISC 3227e86242bSMario Six help 3237e86242bSMario Six Support gdsys FPGA's IO endpoint driver. 324d2166319SMario Six 325d2166319SMario Sixconfig MPC83XX_SERDES 326d2166319SMario Six bool "Enable MPC83xx serdes driver" 327d2166319SMario Six depends on MISC 328d2166319SMario Six help 329d2166319SMario Six Support for serdes found on MPC83xx SoCs. 330d2166319SMario Six 33162030004STien Fong Cheeconfig FS_LOADER 33262030004STien Fong Chee bool "Enable loader driver for file system" 33362030004STien Fong Chee help 33462030004STien Fong Chee This is file system generic loader which can be used to load 33562030004STien Fong Chee the file image from the storage into target such as memory. 33662030004STien Fong Chee 33762030004STien Fong Chee The consumer driver would then use this loader to program whatever, 33862030004STien Fong Chee ie. the FPGA device. 33962030004STien Fong Chee 340c0a2b086SMario Sixconfig GDSYS_SOC 341c0a2b086SMario Six bool "Enable gdsys SOC driver" 342c0a2b086SMario Six depends on MISC 343c0a2b086SMario Six help 344c0a2b086SMario Six Support for gdsys IHS SOC, a simple bus associated with each gdsys 345c0a2b086SMario Six IHS (Integrated Hardware Systems) FPGA, which holds all devices whose 346c0a2b086SMario Six register maps are contained within the FPGA's register map. 347c0a2b086SMario Six 348ab88bd2bSMario Sixconfig IHS_FPGA 349ab88bd2bSMario Six bool "Enable IHS FPGA driver" 350ab88bd2bSMario Six depends on MISC 351ab88bd2bSMario Six help 352ab88bd2bSMario Six Support IHS (Integrated Hardware Systems) FPGA, the main FPGAs on 353ab88bd2bSMario Six gdsys devices, which supply the majority of the functionality offered 354ab88bd2bSMario Six by the devices. This driver supports both CON and CPU variants of the 355ab88bd2bSMario Six devices, depending on the device tree entry. 356ab88bd2bSMario Six 3570b11dbf7SMasahiro Yamadaendmenu 358