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/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ssc-block-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
10 - Michael Srba <Michael.Srba@seznam.cz>
20 The SSC (Snapdragon Sensor Core) block contains a gpio controller, i2c/spi/uart
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
32 - description: SSCAON_CONFIG0 registers
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3568-naneng-combphy
16 - rockchip,rk3588-naneng-combphy
23 - description: reference clock
24 - description: apb clock
25 - description: pipe clock
[all …]
/openbmc/linux/drivers/bus/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
39 and internal bus master decoding.
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
[all …]
/openbmc/linux/drivers/phy/cadence/
H A Dphy-cadence-torrent.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-cadence.h>
12 #include <linux/clk-provider.h>
239 [CDNS_TORRENT_REFCLK_DRIVER] = "refclk-driver",
240 [CDNS_TORRENT_DERIVED_REFCLK] = "refclk-der",
241 [CDNS_TORRENT_RECEIVED_REFCLK] = "refclk-rec",
329 #define CDNS_TORRENT_KEY(refclk0, refclk1, link0, link1, ssc) \ argument
334 (((ssc) << SSC_SHIFT) & SSC_MASK))
459 enum cdns_torrent_ssc_mode ssc) in cdns_torrent_get_tbl_vals() argument
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/openbmc/qemu/hw/arm/
H A Dstm32l4x5_soc.c4 * Copyright (c) 2023-2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
5 * Copyright (c) 2023-2024 Inès Varhol <ines.varhol@telecom-paris.fr>
7 * SPDX-License-Identifier: GPL-2.0-or-later
10 * See the COPYING file in the top-level directory.
20 * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
21 * https://www.st.com/en/microcontrollers-microprocessors/stm32l4x5/documentation.html
27 #include "exec/address-spaces.h"
29 #include "hw/or-irq.h"
33 #include "hw/qdev-clock.h"
49 * Some IRQs are connected to the same CPU IRQ (denoted by -1)
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_core.h1 /* SPDX-License-Identifier: MIT */
60 * fills out the pipe-config with the hw state.
129 int ssc; member
133 * Bitmask of PLLs using the PCH SSC, indexed using enum intel_dpll_id.
179 * if we get a HPD irq from DP and a HPD irq from non-DP
180 * the non-DP HPD could block the workqueue on a mode config
183 * blocked behind the non-DP one.
261 * protects * intel_crtc->wm.active and
262 * crtc_state->wm.need_postvbl_update.
272 /* Top level crtc-ish functions */
[all …]
H A Dintel_dpll_mgr.c2 * Copyright © 2006-2016 Intel Corporation
44 * per-pipe or per-encoder dedicated PLLs, others allow the use of any PLL
121 for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) { in intel_atomic_duplicate_dpll_state()
122 struct intel_shared_dpll *pll = &dev_priv->display.dpll.shared_dplls[i]; in intel_atomic_duplicate_dpll_state()
124 shared_dpll[i] = pll->state; in intel_atomic_duplicate_dpll_state()
133 drm_WARN_ON(s->dev, !drm_modeset_is_locked(&s->dev->mode_config.connection_mutex)); in intel_atomic_get_shared_dpll_state()
135 if (!state->dpll_set) { in intel_atomic_get_shared_dpll_state()
136 state->dpll_set = true; in intel_atomic_get_shared_dpll_state()
138 intel_atomic_duplicate_dpll_state(to_i915(s->dev), in intel_atomic_get_shared_dpll_state()
139 state->shared_dpll); in intel_atomic_get_shared_dpll_state()
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/openbmc/u-boot/cmd/aspeed/
H A Ddptest.c1 // SPDX-License-Identifier: GPL-2.0+
28 /* #define INTERNAL */
104 if (argv[i][0] == '-') { in do_ast_dptest()
127 #ifdef INTERNAL in do_ast_dptest()
128 printf("Internal Version\n"); in do_ast_dptest()
144 printf("0: Change SSC on/off\n"); in do_ast_dptest()
147 #ifdef INTERNAL in do_ast_dptest()
152 printf("6: SSC shift -80ppm\n"); in do_ast_dptest()
153 printf("7: SSC shift -120ppm\n"); in do_ast_dptest()
187 #ifdef INTERNAL in do_ast_dptest()
[all …]
/openbmc/linux/drivers/misc/cardreader/
H A Drtsx_usb.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
36 dev_dbg(&ucr->pusb_intf->dev, "%s: sg transfer timed out", __func__); in rtsx_usb_sg_timed_out()
37 usb_sg_cancel(&ucr->current_sg); in rtsx_usb_sg_timed_out()
46 dev_dbg(&ucr->pusb_intf->de in rtsx_usb_bulk_transfer_sglist()
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H A Drts5228.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
45 drive_sel = pcr->sd30_drive_sel_3v3; in rts5228_fill_driving()
48 drive_sel = pcr->sd30_drive_sel_1v8; in rts5228_fill_driving()
63 struct pci_dev *pdev = pcr->pci; in rtsx5228_fetch_vendor_settings()
74 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg); in rtsx5228_fetch_vendor_settings()
75 pcr->aspm_en = rtsx_reg_to_aspm(reg); in rtsx5228_fetch_vendor_settings()
81 pcr->rtd3_en = rtsx_reg_to_rtd3(reg); in rtsx5228_fetch_vendor_settings()
83 pcr->extra_caps |= EXTRA_CAPS_NO_MMC; in rtsx5228_fetch_vendor_settings()
[all …]
H A Drtsx_pcr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
13 #include <linux/dma-mapping.h>
85 if (pcr->aspm_enabled == enable) in rtsx_comm_set_aspm()
88 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_comm_set_aspm()
89 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_comm_set_aspm()
91 enable ? pcr->aspm_en : 0); in rtsx_comm_set_aspm()
92 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_comm_set_aspm()
93 if (pcr->aspm_en & 0x02) in rtsx_comm_set_aspm()
[all …]
H A Drts5261.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
44 drive_sel = pcr->sd30_drive_sel_3v3; in rts5261_fill_driving()
47 drive_sel = pcr->sd30_drive_sel_1v8; in rts5261_fill_driving()
69 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rts5261_force_power_down()
75 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5261_force_power_down()
158 struct rtsx_cr_option *option = &pcr->option; in rts5261_card_power_on()
160 if (option->ocp_en) in rts5261_card_power_on()
194 if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50 || in rts5261_card_power_on()
[all …]
/openbmc/linux/drivers/pci/controller/
H A Dpcie-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2009 - 2019 Broadcom */
26 #include <linux/pci-ecam.h>
37 /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */
152 #define BRCM_INT_PCI_MSI_MASK GENMASK(BRCM_INT_PCI_MSI_NR - 1, 0)
154 32 - BRCM_INT_PCI_MSI_LEGACY_NR)
181 #define IDX_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_INDEX])
182 #define DATA_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_DATA])
183 #define PCIE_RGR1_SW_INIT_1(pcie) (pcie->reg_offsets[RGR1_SW_INIT_1])
248 /* Internal PCIe Host Controller Information.*/
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG/GOOGLE Peach-Pit board device tree source
9 /dts-v1/;
11 #include <dt-bindings/clock/maxim,max77802.h>
12 #include <dt-bindings/regulator/maxim,max77802.h>
17 compatible = "google,pit-rev#", "google,pit",
21 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
22 hwid = "PIT TEST A-A 7848";
23 lazy-init = <1>;
34 compatible = "pwm-backlight";
[all …]
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/input/input.h>
48 samsung,bl1-offset = <0x1400>;
49 samsung,bl2-offset = <0x3400>;
50 u-boot-memory = "/memory";
51 u-boot-offset = <0x3e00000 0x100000>;
56 #address-cells = <1>;
[all …]
/openbmc/qemu/target/arm/
H A Ddebug_helper.c6 * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "cpu-features.h"
14 #include "exec/exec-all.h"
15 #include "exec/helper-proto.h"
30 route_to_el2 = env->cp15.hcr_el2 & HCR_TGE || in arm_debug_target_el()
31 env->cp15.mdcr_el2 & MDCR_TDE; in arm_debug_target_el()
76 && extract32(env->cp15.mdcr_el3, 16, 1)) { in aa64_generate_debug_exceptions()
87 return extract32(env->cp15.mdscr_el1, 13, 1) in aa64_generate_debug_exceptions()
88 && !(env->daif & PSTATE_D); in aa64_generate_debug_exceptions()
106 if (el == 0 && (env->cp15.sder & 1)) { in aa32_generate_debug_exceptions()
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/
H A Dparade-ps8622.c1 // SPDX-License-Identifier: GPL-2.0-only
68 struct i2c_adapter *adap = client->adapter; in ps8622_set()
72 msg.addr = client->addr + page; in ps8622_set()
80 client->addr + page, reg, val, ret); in ps8622_set()
86 struct i2c_client *cl = ps8622->client; in ps8622_send_config()
137 /* [7:5] DCO_FTRNG=+-40% */ in ps8622_send_config()
147 /* Gitune=-37% */ in ps8622_send_config()
167 /* [7:6] Right-bar GPIO output strength is 8mA */ in ps8622_send_config()
179 err = ps8622_set(cl, 0x01, 0x02, 0x80 | ps8622->max_lane_count); in ps8622_send_config()
184 err = ps8622_set(cl, 0x01, 0x21, 0x80 | ps8622->lane_count); in ps8622_send_config()
[all …]
/openbmc/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_14nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
17 * DSI PLL 14nm - clock diagram (eg: DSI0):
22 * +----+ | +----+
23 * dsi0vco_clk ---| n1 |--o--| /8 |-- dsi0pllbyte
24 * +----+ | +----+
26 * | +----+ |
27 * o---| /2 |--o--|\
28 * | +----+ | \ +----+
29 * | | |--| n2 |-- dsi0pll
[all …]
H A Ddsi_phy_7nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 7nm - clock diagram (eg: DSI0): TODO: updated CPHY diagram
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
29 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
[all …]
H A Ddsi_phy_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 10nm - clock diagram (eg: DSI0):
20 * +---------+ | +----------+ | +----+
21 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
22 * +---------+ | +----------+ | +----+
26 * | | +----+ | |\ dsi0_pclk_mux
27 * | |--| /2 |--o--| \ |
28 * | | +----+ | \ | +---------+
29 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-lantiq-ssc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 * Copyright (C) 2016 Hauke Mehrtens <hauke@hauke-m.de>
142 #define LTQ_SPI_RXCNT_TODO_M 0xFFFF /* Recevie to-do value */
191 return __raw_readl(spi->regbase + reg); in lantiq_ssc_readl()
197 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_writel()
203 u32 val = __raw_readl(spi->regbase + reg); in lantiq_ssc_maskl()
207 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_maskl()
212 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in tx_fifo_level()
215 return (fstat >> LTQ_SPI_FSTAT_TXFFL_S) & hwcfg->fifo_size_mask; in tx_fifo_level()
[all …]
/openbmc/linux/drivers/phy/
H A Dphy-xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene Multi-purpose PHY driver
10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
11 * The first PLL clock macro is used for internal reference clock. The second
15 * required if internal clock is enabled.
19 * -----------------
20 * | Internal | |------|
21 * | Ref PLL CMU |----| | ------------- ---------
22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|
23 * | | | | ---------
[all …]
/openbmc/u-boot/board/kosagi/novena/
H A Dvideo.c1 // SPDX-License-Identifier: GPL-2.0+
6 * from https://github.com/xobs/novena-linux.git commit
18 #include <asm/arch/imx-regs.h>
22 #include <asm/mach-imx/iomux-v3.h>
23 #include <asm/mach-imx/mxc_i2c.h>
24 #include <asm/mach-imx/video.h>
138 /* something with SSC PLL */ in it6251_program_regs()
143 /* JEIDA, 8-bit depth 0x11, orig 0x42 */ in it6251_program_regs()
165 /* power down lanes 3-0 */ in it6251_program_regs()
181 /* hpd event timer set to 1.6-ish ms */ in it6251_program_regs()
[all …]
/openbmc/ipmitool/lib/
H A Dipmi_fru.c22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
82 /* get_fru_area_str - Parse FRU area string from raw data
91 static const char bcd_plus[] = "0123456789 -.:,_"; in get_fru_area_str()
112 /* hex dump -> 2x length */ in get_fru_area_str()
115 case 2: /* 10b: 6-bit ASCII */ in get_fru_area_str()
116 /* 4 chars per group of 1-3 bytes */ in get_fru_area_str()
119 case 3: /* 11b: 8-bit ASCII */ in get_fru_area_str()
152 case 2: /* 6-bit ASCII */ in get_fru_area_str()
155 k = ((len-i) < 3 ? (len-i) : 3); in get_fru_area_str()
185 /* is_valid_filename - checks file/path supplied by user
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/openbmc/linux/drivers/i2c/busses/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
51 will be called i2c-ali15x3.
63 will be called i2c-amd756.
70 S4882 motherboard. On this 4-CPU board, the SMBus is multiplexed
76 will be called i2c-amd756-s4882.
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