Home
last modified time | relevance | path

Searched +full:soc +full:- +full:gpio12 (Results 1 – 25 of 74) sorted by relevance

123

/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sc7280-lpass-lpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
4 * ALSA SoC platform-machine driver for QTi LPASS
11 #include "pinctrl-lpass-lpi.h"
68 PINCTRL_PIN(12, "gpio12"),
83 static const char * const dmic3_clk_groups[] = { "gpio12" };
93 static const char * const i2s2_data_groups[] = { "gpio12", "gpio13" };
148 .compatible = "qcom,sc7280-lpass-lpi-pinctrl",
157 .name = "qcom-sc7280-lpass-lpi-pinctrl",
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,bcm6318-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6318 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
20 "#size-cells": true
[all …]
H A Dbrcm,bcm6362-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6362 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
20 "#size-cells": true
[all …]
H A Dbrcm,bcm6368-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6368 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
20 "#size-cells": true
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019-ap.dk07.1-c1.dts1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include "qcom-ipq4019-ap.dk07.1.dtsi"
8 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
9 compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019";
11 soc {
14 perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
22 serial_1_pins: serial1-pinmux {
26 bias-disable;
29 spi_0_pins: spi-0-pinmux {
[all …]
H A Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
25 soc {
27 serial_0_pins: serial0-pinmux {
30 bias-disable;
33 serial_1_pins: serial1-pinmux {
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
H A Dbcm2837-rpi-zero-2-w.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "bcm2836-rpi.dtsi"
9 #include "bcm283x-rpi-led-deprecated.dtsi"
10 #include "bcm283x-rpi-usb-otg.dtsi"
11 #include "bcm283x-rpi-wifi-bt.dtsi"
14 compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837";
24 stdout-path = "serial1:115200n8";
29 shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
37 * "NC" = not connected (no rail from the SoC)
[all …]
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 interrupt-parent = <&intc>;
10 soc {
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq9574-rdp449.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C6";
15 compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574";
22 stdout-path = "serial0:115200n8";
27 pinctrl-0 = <&spi_0_pins>;
28 pinctrl-names = "default";
32 compatible = "micron,n25q128a11", "jedec,spi-nor";
[all …]
H A Dipq9574-rdp454.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C9";
15 compatible = "qcom,ipq9574-ap-al02-c9", "qcom,ipq9574";
22 stdout-path = "serial0:115200n8";
27 pinctrl-0 = <&spi_0_pins>;
28 pinctrl-names = "default";
32 compatible = "micron,n25q128a11", "jedec,spi-nor";
[all …]
H A Dipq9574-rdp453.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 /dts-v1/;
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C8";
15 compatible = "qcom,ipq9574-ap-al02-c8", "qcom,ipq9574";
22 stdout-path = "serial0:115200n8";
27 pinctrl-0 = <&spi_0_pins>;
28 pinctrl-names = "default";
32 compatible = "micron,n25q128a11", "jedec,spi-nor";
34 #address-cells = <1>;
[all …]
H A Dipq9574-rdp418.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2";
15 compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574";
22 stdout-path = "serial0:115200n8";
27 pinctrl-0 = <&spi_0_pins>;
28 pinctrl-names = "default";
32 compatible = "micron,n25q128a11", "jedec,spi-nor";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dbcm2835-rpi-b.dts1 /dts-v1/;
3 #include "bcm2835-rpi.dtsi"
4 #include "bcm283x-rpi-smsc9512.dtsi"
5 #include "bcm283x-rpi-usb-host.dtsi"
8 compatible = "raspberrypi,model-b", "brcm,bcm2835";
20 * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
24 * "NC" = not connected (no rail from the SoC)
28 gpio-line-names = "SDA0",
40 "NC", /* GPIO12 */
86 pinctrl-0 = <&gpioout &alt0>;
[all …]
H A Dbcm2835-rpi-b-rev2.dts1 /dts-v1/;
3 #include "bcm2835-rpi.dtsi"
4 #include "bcm283x-rpi-smsc9512.dtsi"
5 #include "bcm283x-rpi-usb-host.dtsi"
8 compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
20 * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf
24 * "NC" = not connected (no rail from the SoC)
28 gpio-line-names = "SDA0",
40 "NC", /* GPIO12 */
85 pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
[all …]
H A Dbcm2835-rpi-a.dts1 /dts-v1/;
3 #include "bcm2835-rpi.dtsi"
4 #include "bcm283x-rpi-usb-host.dtsi"
7 compatible = "raspberrypi,model-a", "brcm,bcm2835";
19 * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
23 * "NC" = not connected (no rail from the SoC)
27 gpio-line-names = "SDA0",
39 "NC", /* GPIO12 */
85 pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
95 hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
[all …]
H A Dbcm2835-rpi-a-plus.dts1 /dts-v1/;
3 #include "bcm2835-rpi.dtsi"
4 #include "bcm283x-rpi-usb-host.dtsi"
7 compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
18 default-state = "keep";
19 linux,default-trigger = "default-on";
29 * "NC" = not connected (no rail from the SoC)
33 gpio-line-names = "SDA0",
45 "GPIO12",
90 pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
[all …]
H A Dbcm2835-rpi-b-plus.dts1 /dts-v1/;
3 #include "bcm2835-rpi.dtsi"
4 #include "bcm283x-rpi-smsc9514.dtsi"
5 #include "bcm283x-rpi-usb-host.dtsi"
8 compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
19 default-state = "keep";
20 linux,default-trigger = "default-on";
27 * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf
28 * RPI-BPLUS sheet 1
31 * "NC" = not connected (no rail from the SoC)
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drt5659.txt7 - compatible : One of "realtek,rt5659" or "realtek,rt5658".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in3-differential
20 - realtek,in4-differential
21 Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended.
23 - realtek,dmic1-data-pin
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dbitmain,bm1880-pinctrl.txt3 This binding describes the pin controller found in the BM1880 SoC.
7 - compatible: Should be "bitmain,bm1880-pinctrl"
8 - reg: Offset and length of pinctrl space in SCTRL.
10 Please refer to pinctrl-bindings.txt in this directory for details of the
16 pin, a group, or a list of pins or groups. This configuration for BM1880 SoC
17 includes pinmux and various pin configuration parameters, such as pull-up,
24 The following generic properties as defined in pinctrl-bindings.txt are valid
29 - pins: An array of strings, each string containing the name of a pin.
32 MIO0 - MIO111
34 - groups: An array of strings, each string containing the name of a pin
[all …]
H A Dqcom,sdx75-tlmm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdx75-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rohit Agarwal <quic_rohiagar@quicinc.com>
13 Top Level Mode Multiplexer pin controller in Qualcomm SDX75 SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sdx75-tlmm
26 interrupt-controller: true
27 "#interrupt-cells": true
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-lantiq.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/drivers/pinctrl/pinctrl-lantiq.h
4 * based on linux/drivers/pinctrl/pinctrl-pxa3xx.h
102 /* soc specific callback used to apply muxing */
119 GPIO12, enumerator
/openbmc/linux/arch/arm/mach-pxa/
H A Dmfp-pxa2xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/soc/pxa/mfp.h>
8 * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx:
19 * bit 23 - Input/Output (PXA2xx specific)
20 * bit 24 - Wakeup Enable(PXA2xx specific)
21 * bit 25 - Keep Output (PXA2xx specific)
66 #define GPIO12_GPIO MFP_CFG_IN(GPIO12, AF0)
/openbmc/linux/drivers/pinctrl/berlin/
H A Dberlin-bg2.c1 // SPDX-License-Identifier: GPL-2.0
7 * Antoine Ténart <antoine.tenart@free-electrons.com>
33 BERLIN_PINCTRL_FUNCTION(0x0, "soc"),
76 BERLIN_PINCTRL_FUNCTION(0x0, "soc"),
81 BERLIN_PINCTRL_FUNCTION(0x0, "soc"),
128 BERLIN_PINCTRL_FUNCTION(0x7, "pdm_b")), /* gpio12..14,pdm */
219 .compatible = "marvell,berlin2-soc-pinctrl",
223 .compatible = "marvell,berlin2-system-pinctrl",
231 return berlin_pinctrl_probe(pdev, device_get_match_data(&pdev->dev)); in berlin2_pinctrl_probe()
237 .name = "berlin-bg2-pinctrl",

123