1*aa261f13SDevi Priya// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*aa261f13SDevi Priya/*
3*aa261f13SDevi Priya * IPQ9574 RDP449 board device tree source
4*aa261f13SDevi Priya *
5*aa261f13SDevi Priya * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6*aa261f13SDevi Priya * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
7*aa261f13SDevi Priya */
8*aa261f13SDevi Priya
9*aa261f13SDevi Priya/dts-v1/;
10*aa261f13SDevi Priya
11*aa261f13SDevi Priya#include "ipq9574.dtsi"
12*aa261f13SDevi Priya
13*aa261f13SDevi Priya/ {
14*aa261f13SDevi Priya	model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C6";
15*aa261f13SDevi Priya	compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574";
16*aa261f13SDevi Priya
17*aa261f13SDevi Priya	aliases {
18*aa261f13SDevi Priya		serial0 = &blsp1_uart2;
19*aa261f13SDevi Priya	};
20*aa261f13SDevi Priya
21*aa261f13SDevi Priya	chosen {
22*aa261f13SDevi Priya		stdout-path = "serial0:115200n8";
23*aa261f13SDevi Priya	};
24*aa261f13SDevi Priya};
25*aa261f13SDevi Priya
26*aa261f13SDevi Priya&blsp1_spi0 {
27*aa261f13SDevi Priya	pinctrl-0 = <&spi_0_pins>;
28*aa261f13SDevi Priya	pinctrl-names = "default";
29*aa261f13SDevi Priya	status = "okay";
30*aa261f13SDevi Priya
31*aa261f13SDevi Priya	flash@0 {
32*aa261f13SDevi Priya		compatible = "micron,n25q128a11", "jedec,spi-nor";
33*aa261f13SDevi Priya		reg = <0>;
34*aa261f13SDevi Priya		#address-cells = <1>;
35*aa261f13SDevi Priya		#size-cells = <1>;
36*aa261f13SDevi Priya		spi-max-frequency = <50000000>;
37*aa261f13SDevi Priya	};
38*aa261f13SDevi Priya};
39*aa261f13SDevi Priya
40*aa261f13SDevi Priya&blsp1_uart2 {
41*aa261f13SDevi Priya	pinctrl-0 = <&uart2_pins>;
42*aa261f13SDevi Priya	pinctrl-names = "default";
43*aa261f13SDevi Priya	status = "okay";
44*aa261f13SDevi Priya};
45*aa261f13SDevi Priya
46*aa261f13SDevi Priya&rpm_requests {
47*aa261f13SDevi Priya	regulators {
48*aa261f13SDevi Priya		compatible = "qcom,rpm-mp5496-regulators";
49*aa261f13SDevi Priya
50*aa261f13SDevi Priya		ipq9574_s1: s1 {
51*aa261f13SDevi Priya		/*
52*aa261f13SDevi Priya		 * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
53*aa261f13SDevi Priya		 * During regulator registration, kernel not knowing the initial voltage,
54*aa261f13SDevi Priya		 * considers it as zero and brings up the regulators with minimum supported voltage.
55*aa261f13SDevi Priya		 * Update the regulator-min-microvolt with SVS voltage of 725mV so that
56*aa261f13SDevi Priya		 * the regulators are brought up with 725mV which is sufficient for all the
57*aa261f13SDevi Priya		 * corner parts to operate at 800MHz
58*aa261f13SDevi Priya		 */
59*aa261f13SDevi Priya			regulator-min-microvolt = <725000>;
60*aa261f13SDevi Priya			regulator-max-microvolt = <1075000>;
61*aa261f13SDevi Priya		};
62*aa261f13SDevi Priya	};
63*aa261f13SDevi Priya};
64*aa261f13SDevi Priya
65*aa261f13SDevi Priya&sleep_clk {
66*aa261f13SDevi Priya	clock-frequency = <32000>;
67*aa261f13SDevi Priya};
68*aa261f13SDevi Priya
69*aa261f13SDevi Priya&tlmm {
70*aa261f13SDevi Priya	spi_0_pins: spi-0-state {
71*aa261f13SDevi Priya		pins = "gpio11", "gpio12", "gpio13", "gpio14";
72*aa261f13SDevi Priya		function = "blsp0_spi";
73*aa261f13SDevi Priya		drive-strength = <8>;
74*aa261f13SDevi Priya		bias-disable;
75*aa261f13SDevi Priya	};
76*aa261f13SDevi Priya};
77*aa261f13SDevi Priya
78*aa261f13SDevi Priya&xo_board_clk {
79*aa261f13SDevi Priya	clock-frequency = <24000000>;
80*aa261f13SDevi Priya};
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