1*d8a83f8dSDevi Priya// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*d8a83f8dSDevi Priya/* 3*d8a83f8dSDevi Priya * IPQ9574 RDP418 board device tree source 4*d8a83f8dSDevi Priya * 5*d8a83f8dSDevi Priya * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6*d8a83f8dSDevi Priya * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 7*d8a83f8dSDevi Priya */ 8*d8a83f8dSDevi Priya 9*d8a83f8dSDevi Priya/dts-v1/; 10*d8a83f8dSDevi Priya 11*d8a83f8dSDevi Priya#include "ipq9574.dtsi" 12*d8a83f8dSDevi Priya 13*d8a83f8dSDevi Priya/ { 14*d8a83f8dSDevi Priya model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2"; 15*d8a83f8dSDevi Priya compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574"; 16*d8a83f8dSDevi Priya 17*d8a83f8dSDevi Priya aliases { 18*d8a83f8dSDevi Priya serial0 = &blsp1_uart2; 19*d8a83f8dSDevi Priya }; 20*d8a83f8dSDevi Priya 21*d8a83f8dSDevi Priya chosen { 22*d8a83f8dSDevi Priya stdout-path = "serial0:115200n8"; 23*d8a83f8dSDevi Priya }; 24*d8a83f8dSDevi Priya}; 25*d8a83f8dSDevi Priya 26*d8a83f8dSDevi Priya&blsp1_spi0 { 27*d8a83f8dSDevi Priya pinctrl-0 = <&spi_0_pins>; 28*d8a83f8dSDevi Priya pinctrl-names = "default"; 29*d8a83f8dSDevi Priya status = "okay"; 30*d8a83f8dSDevi Priya 31*d8a83f8dSDevi Priya flash@0 { 32*d8a83f8dSDevi Priya compatible = "micron,n25q128a11", "jedec,spi-nor"; 33*d8a83f8dSDevi Priya reg = <0>; 34*d8a83f8dSDevi Priya #address-cells = <1>; 35*d8a83f8dSDevi Priya #size-cells = <1>; 36*d8a83f8dSDevi Priya spi-max-frequency = <50000000>; 37*d8a83f8dSDevi Priya }; 38*d8a83f8dSDevi Priya}; 39*d8a83f8dSDevi Priya 40*d8a83f8dSDevi Priya&blsp1_uart2 { 41*d8a83f8dSDevi Priya pinctrl-0 = <&uart2_pins>; 42*d8a83f8dSDevi Priya pinctrl-names = "default"; 43*d8a83f8dSDevi Priya status = "okay"; 44*d8a83f8dSDevi Priya}; 45*d8a83f8dSDevi Priya 46*d8a83f8dSDevi Priya&rpm_requests { 47*d8a83f8dSDevi Priya regulators { 48*d8a83f8dSDevi Priya compatible = "qcom,rpm-mp5496-regulators"; 49*d8a83f8dSDevi Priya 50*d8a83f8dSDevi Priya ipq9574_s1: s1 { 51*d8a83f8dSDevi Priya /* 52*d8a83f8dSDevi Priya * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. 53*d8a83f8dSDevi Priya * During regulator registration, kernel not knowing the initial voltage, 54*d8a83f8dSDevi Priya * considers it as zero and brings up the regulators with minimum supported voltage. 55*d8a83f8dSDevi Priya * Update the regulator-min-microvolt with SVS voltage of 725mV so that 56*d8a83f8dSDevi Priya * the regulators are brought up with 725mV which is sufficient for all the 57*d8a83f8dSDevi Priya * corner parts to operate at 800MHz 58*d8a83f8dSDevi Priya */ 59*d8a83f8dSDevi Priya regulator-min-microvolt = <725000>; 60*d8a83f8dSDevi Priya regulator-max-microvolt = <1075000>; 61*d8a83f8dSDevi Priya }; 62*d8a83f8dSDevi Priya }; 63*d8a83f8dSDevi Priya}; 64*d8a83f8dSDevi Priya 65*d8a83f8dSDevi Priya&sdhc_1 { 66*d8a83f8dSDevi Priya pinctrl-0 = <&sdc_default_state>; 67*d8a83f8dSDevi Priya pinctrl-names = "default"; 68*d8a83f8dSDevi Priya mmc-ddr-1_8v; 69*d8a83f8dSDevi Priya mmc-hs200-1_8v; 70*d8a83f8dSDevi Priya mmc-hs400-1_8v; 71*d8a83f8dSDevi Priya mmc-hs400-enhanced-strobe; 72*d8a83f8dSDevi Priya max-frequency = <384000000>; 73*d8a83f8dSDevi Priya bus-width = <8>; 74*d8a83f8dSDevi Priya status = "okay"; 75*d8a83f8dSDevi Priya}; 76*d8a83f8dSDevi Priya 77*d8a83f8dSDevi Priya&sleep_clk { 78*d8a83f8dSDevi Priya clock-frequency = <32000>; 79*d8a83f8dSDevi Priya}; 80*d8a83f8dSDevi Priya 81*d8a83f8dSDevi Priya&tlmm { 82*d8a83f8dSDevi Priya sdc_default_state: sdc-default-state { 83*d8a83f8dSDevi Priya clk-pins { 84*d8a83f8dSDevi Priya pins = "gpio5"; 85*d8a83f8dSDevi Priya function = "sdc_clk"; 86*d8a83f8dSDevi Priya drive-strength = <8>; 87*d8a83f8dSDevi Priya bias-disable; 88*d8a83f8dSDevi Priya }; 89*d8a83f8dSDevi Priya 90*d8a83f8dSDevi Priya cmd-pins { 91*d8a83f8dSDevi Priya pins = "gpio4"; 92*d8a83f8dSDevi Priya function = "sdc_cmd"; 93*d8a83f8dSDevi Priya drive-strength = <8>; 94*d8a83f8dSDevi Priya bias-pull-up; 95*d8a83f8dSDevi Priya }; 96*d8a83f8dSDevi Priya 97*d8a83f8dSDevi Priya data-pins { 98*d8a83f8dSDevi Priya pins = "gpio0", "gpio1", "gpio2", 99*d8a83f8dSDevi Priya "gpio3", "gpio6", "gpio7", 100*d8a83f8dSDevi Priya "gpio8", "gpio9"; 101*d8a83f8dSDevi Priya function = "sdc_data"; 102*d8a83f8dSDevi Priya drive-strength = <8>; 103*d8a83f8dSDevi Priya bias-pull-up; 104*d8a83f8dSDevi Priya }; 105*d8a83f8dSDevi Priya 106*d8a83f8dSDevi Priya rclk-pins { 107*d8a83f8dSDevi Priya pins = "gpio10"; 108*d8a83f8dSDevi Priya function = "sdc_rclk"; 109*d8a83f8dSDevi Priya drive-strength = <8>; 110*d8a83f8dSDevi Priya bias-pull-down; 111*d8a83f8dSDevi Priya }; 112*d8a83f8dSDevi Priya }; 113*d8a83f8dSDevi Priya 114*d8a83f8dSDevi Priya spi_0_pins: spi-0-state { 115*d8a83f8dSDevi Priya pins = "gpio11", "gpio12", "gpio13", "gpio14"; 116*d8a83f8dSDevi Priya function = "blsp0_spi"; 117*d8a83f8dSDevi Priya drive-strength = <8>; 118*d8a83f8dSDevi Priya bias-disable; 119*d8a83f8dSDevi Priya }; 120*d8a83f8dSDevi Priya}; 121*d8a83f8dSDevi Priya 122*d8a83f8dSDevi Priya&xo_board_clk { 123*d8a83f8dSDevi Priya clock-frequency = <24000000>; 124*d8a83f8dSDevi Priya}; 125