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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-soquartz-blade.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3566-soquartz.dtsi"
14 compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
17 vcc3v0_sd: vcc3v0-sd-regulator {
18 compatible = "regulator-fixed";
[all …]
H A Drk3566-soquartz-cm4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
8 model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
12 vcc12v_dcin: vcc12v-dcin-regulator {
13 compatible = "regulator-fixed";
14 regulator-name = "vcc12v_dcin";
15 regulator-always-on;
16 regulator-boot-on;
[all …]
H A Drk3566-soquartz-model-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
12 vcc12v_dcin: vcc12v-dcin-regulator {
13 compatible = "regulator-fixed";
14 regulator-name = "vcc12v_dcin";
15 regulator-always-on;
16 regulator-boot-on;
17 regulator-min-microvolt = <12000000>;
[all …]
H A Drk3566-soquartz.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
22 stdout-path = "serial2:1500000n8";
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
[all …]
H A Drk3568-bpi-r2-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Author: Frank Wunderlich <frank-w@public-files.de>
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,vop2.h>
15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
16 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
26 stdout-path = "serial2:1500000n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs35l41.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - david.rhodes@cirrus.com
19 - cirrus,cs35l40
20 - cirrus,cs35l41
28 '#sound-dai-cells':
33 reset-gpios:
36 VA-supply:
39 VP-supply:
[all …]
H A Dwlf,wm8960.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
22 clock-names:
24 - const: mclk
26 '#sound-dai-cells':
29 AVDD-supply:
32 DBVDD-supply:
35 DCVDD-supply:
[all …]
H A Dmediatek,mt8188-afe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8188-afe
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.yaml for details.
[all …]
H A Dmt8195-afe-pcm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8195-audio
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.txt for details.
[all …]
/openbmc/linux/tools/testing/selftests/mm/
H A Dgup_longterm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GUP long-term page pinning tests.
54 * R/W long-term pinning. For these filesystems, we can be fairly sure in fs_is_unknown()
91 static void do_test(int fd, size_t size, enum test_type type, bool shared) in do_test() argument
112 shared ? MAP_SHARED : MAP_PRIVATE, fd, 0); in do_test()
114 if (size == pagesize || shared) in do_test()
122 * Fault in the page writable such that GUP-fast can eventually pin in do_test()
143 if (rw && shared && fs_is_unknown(fs_type)) { in do_test()
149 * expected to work. Otherwise, we expect long-term R/W pinning in do_test()
152 should_work = !shared || !rw || in do_test()
[all …]
H A Dcow.c1 // SPDX-License-Identifier: GPL-2.0-only
68 for (; size; addr += pagesize, size -= pagesize) in range_is_swapped()
81 if (pipe(comm_pipes->child_ready) < 0) in setup_comm_pipes()
82 return -errno; in setup_comm_pipes()
83 if (pipe(comm_pipes->parent_ready) < 0) { in setup_comm_pipes()
84 close(comm_pipes->child_ready[0]); in setup_comm_pipes()
85 close(comm_pipes->child_ready[1]); in setup_comm_pipes()
86 return -errno; in setup_comm_pipes()
94 close(comm_pipes->child_ready[0]); in close_comm_pipes()
95 close(comm_pipes->child_ready[1]); in close_comm_pipes()
[all …]
/openbmc/linux/drivers/platform/x86/x86-android-tablets/
H A Dshared-psy-info.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Shared psy info for X86 tablets which ship with Android as the factory image
8 * Copyright (C) 2021-2023 Hans de Goede <hdegoede@redhat.com>
17 #include "shared-psy-info.h"
19 /* Generic / shared charger / battery settings */
20 const char * const tusb1211_chg_det_psy[] = { "tusb1211-charger-detect" };
21 const char * const bq24190_psy[] = { "bq24190-charger" };
22 const char * const bq25890_psy[] = { "bq25890-charger-0" };
25 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", bq24190_psy),
34 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", bq25890_psy),
[all …]
/openbmc/linux/drivers/net/phy/
H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
119 * The value is calculated as following: (1/1000000)/((2^-32)/4)
287 /* Shared structure between the PHYs of the same package. */
429 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
433 if (type && type->interrupt_level_mask) in kszphy_config_intr()
434 mask = type->interrupt_level_mask; in kszphy_config_intr()
438 /* set the interrupt pin active low */ in kszphy_config_intr()
446 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
509 return -EINVAL; in kszphy_setup_led()
[all …]
/openbmc/linux/sound/pci/hda/
H A Dhda_generic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */ member
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
52 bool pin_fixed:1; /* path with fixed pin */
56 /* mic/line-in auto switching entry */
[all …]
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
32 represents a bit connected to a particular pin, or "ball" on Ball Grid Array
35 passes such pin configuration data to drivers.
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
41 often have a few such pins to help with pin scarcity on SOCs; and there are
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Drenesas,rcar-gyroadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
23 - enum:
24 - renesas,r8a7791-gyroadc
25 - renesas,r8a7792-gyroadc
[all …]
/openbmc/linux/drivers/staging/iio/Documentation/
H A Dsysfs-bus-iio-dds4 Contact: linux-iio@vger.kernel.org
8 which allows for pin controlled FSK Frequency Shift Keying
15 Contact: linux-iio@vger.kernel.org
18 obtain the desired value in Hz. If shared across all frequency
20 if shared across all channels.
24 Contact: linux-iio@vger.kernel.org
34 Contact: linux-iio@vger.kernel.org
38 allows for pin controlled PSK Phase Shift Keying
45 Contact: linux-iio@vger.kernel.org
48 the desired value in rad. If shared across all phase registers
[all …]
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_dma_buf.c41 #include <linux/dma-buf.h>
42 #include <linux/dma-fence-array.h>
43 #include <linux/pci-p2pdma.h>
47 * amdgpu_dma_buf_attach - &dma_buf_ops.attach implementation
49 * @dmabuf: DMA-buf where we attach to
52 * Add the attachment as user to the exported DMA-buf.
57 struct drm_gem_object *obj = dmabuf->priv; in amdgpu_dma_buf_attach()
59 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); in amdgpu_dma_buf_attach()
62 if (pci_p2pdma_distance(adev->pdev, attach->dev, false) < 0) in amdgpu_dma_buf_attach()
63 attach->peer2peer = false; in amdgpu_dma_buf_attach()
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dibm,ppc4xx-gpio.txt3 All GPIOs are pin-shared with other functions. DCRs control whether a
4 particular pin that has GPIO capabilities acts as a GPIO or is used for
6 an open-drain driver.
9 - compatible: must be "ibm,ppc4xx-gpio"
10 - reg: address and length of the register set for the device
11 - #gpio-cells: must be set to 2. The first cell is the pin number
15 - gpio-controller: marks the device node as a gpio controller.
20 compatible = "ibm,ppc4xx-gpio";
22 #gpio-cells = <2>;
23 gpio-controller;
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dnvidia,tegra20-kbc.txt2 The key controller has maximum 24 pins to make matrix keypad. Any pin
3 can be configured as row or column. The maximum column pin can be 8
7 - compatible: "nvidia,tegra20-kbc"
8 - reg: Register base address of KBC.
9 - interrupts: Interrupt number for the KBC.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
11 array of pin numbers which is used as rows.
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
13 array of pin numbers which is used as column.
14 - linux,keymap: The keymap for keys as described in the binding document
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 Freescale IMX pin configuration node is a node of a group of pins which can be
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
24 Required properties for pin configuration node:
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
[all …]
/openbmc/linux/arch/arm/mach-orion5x/
H A Dboard-mss2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Maxtor Shared Storage II Board Setup
13 #include <asm/mach-types.h>
17 #include "bridge-regs.h"
21 * Maxtor Shared Storage II Info
27 static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in mss2_pci_map_irq() argument
32 * Check for devices with hard-wired IRQs. in mss2_pci_map_irq()
34 irq = orion5x_pci_map_irq(dev, slot, pin); in mss2_pci_map_irq()
35 if (irq != -1) in mss2_pci_map_irq()
38 return -1; in mss2_pci_map_irq()
[all …]
/openbmc/linux/arch/mips/pci/
H A Dfixup-ip32.c1 // SPDX-License-Identifier: GPL-2.0
27 {0, 0, 0, 0, 0}, /* This is placeholder row - never used */
37 * Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
38 * the device (1-4 => A-D), tell what irq to use. Note that we don't
39 * in theory have slots 4 and 5, and we never normally use the shared
40 * irqs. I suppose a device without a pin A will thank us for doing it
43 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in pcibios_map_irq() argument
45 return irq_tab_mace[slot][pin]; in pcibios_map_irq()

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