dts/rockchip/rk3566-soquartz-blade.dts

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3566-soquartz.dtsi"
14 	compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
17 	vcc3v0_sd: vcc3v0-sd-regulator {
18 		compatible = "regulator-fixed";
19 		regulator-name = "vcc3v0_sd";
20 		regulator-always-on;
21 		regulator-boot-on;
22 		regulator-min-microvolt = <3300000>;
23 		regulator-max-microvolt = <3300000>;
24 		vin-supply = <&vcc3v3_sys>;
28 	vcc3v3_pcie_p: vcc3v3-pcie-regulator {
29 		compatible = "regulator-fixed";
30 		regulator-name = "vcc3v3_pcie_p";
31 		regulator-always-on;
32 		regulator-boot-on;
33 		regulator-min-microvolt = <3300000>;
34 		regulator-max-microvolt = <3300000>;
35 		vin-supply = <&vbus>;
38 	vcc5v_dcin: vcc5v-dcin-regulator {
39 		compatible = "regulator-fixed";
40 		regulator-name = "vcc5v_dcin";
41 		regulator-always-on;
42 		regulator-boot-on;
43 		regulator-min-microvolt = <5000000>;
44 		regulator-max-microvolt = <5000000>;
49 	phy-supply = <&vcc3v3_sys>;
59  * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
60  * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
68  * i2c2 is exposed on CM1 / Module1A - to PI40
69  * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
70  * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
77  * i2c3 is exposed on CM1 / Module1A - to PI40
78  * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
79  * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
86  * i2c4 is exposed on CM2 / Module1B - to PI40
87  * pin 45 - GPIO24 - i2c4_scl_m1
88  * pin 47 - GPIO23 - i2c4_sda_m1
95  * i2s1_8ch is exposed on CM1 / Module1A - to PI40
96  * pin 24 - GPIO26 - i2s1_sdi1_m1
97  * pin 25 - GPIO21 - i2s1_sdo0_m1
98  * pin 26 - GPIO19 - i2s1_lrck_tx_m1
99  * pin 27 - GPIO20 - i2s1_sdi0_m1
100  * pin 29 - GPIO16 - i2s1_sdi3_m1
101  * pin 30 - GPIO6  - i2s1_sdi2_m1
102  * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
103  * pin 41 - GPIO25 - i2s1_sdo2_m1
104  * pin 49 - GPIO18 - i2s1_sclk_tx_m1
105  * pin 50 - GPIO17 - i2s1_mclk_m1
106  * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
115 	linux,default-trigger = "disk-activity";
122 	linux,default-trigger = "heartbeat";
127 	vpcie3v3-supply = <&vcc3v3_pcie_p>;
136  * saradc is exposed on CM1 / Module1A - to J2
137  * pin 94 - AIN1 - saradc_vin3
138  * pin 96 - AIN0 - saradc_vin2
145 	vmmc-supply = <&vcc3v0_sd>;
150  * spi3 is exposed on CM1 / Module1A - to PI40
151  * pin 37 - GPIO7  - spi3_cs1_m0
152  * pin 38 - GPIO11 - spi3_clk_m0
153  * pin 39 - GPIO8  - spi3_cs0_m0
154  * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
155  * pin 44 - GPIO10 - spi3_mosi_m0
162  * uart2 is exposed on CM1 / Module1A - to PI40
163  * pin 51 - GPIO15 - uart2_rx_m0
164  * pin 55 - GPIO14 - uart2_tx_m0
171  * uart7 is exposed on CM1 / Module1A - to PI40
172  * pin 46 - GPIO22 - uart7_tx_m2
173  * pin 47 - GPIO23 - uart7_rx_m2
184 	phy-supply = <&vbus>;
193 	vin-supply = <&vcc5v_dcin>;