19a0d4404SChristian Lamparter* IBM/AMCC/APM GPIO Controller for PowerPC 4XX series and compatible SoCs 29a0d4404SChristian Lamparter 39a0d4404SChristian LamparterAll GPIOs are pin-shared with other functions. DCRs control whether a 49a0d4404SChristian Lamparterparticular pin that has GPIO capabilities acts as a GPIO or is used for 59a0d4404SChristian Lamparteranother purpose. GPIO outputs are separately programmable to emulate 69a0d4404SChristian Lamparteran open-drain driver. 79a0d4404SChristian Lamparter 89a0d4404SChristian LamparterRequired properties: 99a0d4404SChristian Lamparter - compatible: must be "ibm,ppc4xx-gpio" 109a0d4404SChristian Lamparter - reg: address and length of the register set for the device 119a0d4404SChristian Lamparter - #gpio-cells: must be set to 2. The first cell is the pin number 129a0d4404SChristian Lamparter and the second cell is used to specify the gpio polarity: 139a0d4404SChristian Lamparter 0 = active high 149a0d4404SChristian Lamparter 1 = active low 159a0d4404SChristian Lamparter - gpio-controller: marks the device node as a gpio controller. 169a0d4404SChristian Lamparter 179a0d4404SChristian LamparterExample: 189a0d4404SChristian Lamparter 199a0d4404SChristian LamparterGPIO0: gpio@ef600b00 { 209a0d4404SChristian Lamparter compatible = "ibm,ppc4xx-gpio"; 219a0d4404SChristian Lamparter reg = <0xef600b00 0x00000048>; 229a0d4404SChristian Lamparter #gpio-cells = <2>; 239a0d4404SChristian Lamparter gpio-controller; 249a0d4404SChristian Lamparter}; 25