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/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Drenesas,sh-rtc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/rtc/renesas,sh-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Real Time Clock for Renesas SH and ARM SoCs
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - const: renesas,r7s72100-rtc # RZ/A1H
17 - const: renesas,sh-rtc
25 interrupt-names:
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/openbmc/linux/drivers/rtc/
H A Drtc-sh.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH On-Chip RTC Support
5 * Copyright (C) 2006 - 2009 Paul Mundt
9 * Based on the old arch/sh/kernel/cpu/rtc.c by:
18 #include <linux/rtc.h>
29 #include <asm/rtc.h>
31 /* Default values for RZ/A RTC */
38 #define DRV_NAME "sh-rtc"
44 #define RSECCNT RTC_REG(1) /* RTC sec */
45 #define RMINCNT RTC_REG(2) /* RTC min */
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/openbmc/openbmc/poky/meta/recipes-core/initscripts/
H A Dinitscripts_1.0.bb2 HOMEPAGE = "https://github.com/fedora-sysv/initscripts"
3 … system. These scripts include actions such as filesystem mounting, fsck, RTC manipulation and ot…
5 LICENSE = "GPL-2.0-only"
13 file://devpts.sh \
15 file://hostname.sh \
16 file://mountall.sh \
17 file://banner.sh \
18 file://bootmisc.sh \
19 file://mountnfs.sh \
21 file://checkfs.sh \
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/openbmc/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7705.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006 - 2009 Paul Mundt
15 #include <asm/rtc.h>
31 RTC, WDT, REF_RCMI, enumerator
35 /* IRQ0->5 are handled in setup-sh3.c */
49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
50 INTC_VECT(RTC, 0x4c0),
56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
83 .name = "sh-sci",
104 .name = "sh-sci",
[all …]
H A Dsetup-sh7710.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006 - 2009 Paul Mundt
15 #include <asm/rtc.h>
28 RTC, WDT, REF, enumerator
32 /* IRQ0->5 are handled in setup-sh3.c */
51 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
52 INTC_VECT(RTC, 0x4c0),
58 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
89 .name = "sh-rtc",
90 .id = -1,
[all …]
H A Dsetup-sh7720.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
21 #include <asm/rtc.h>
28 .end = 0xa413fec0 + 0x28 - 1,
43 .name = "sh-rtc",
44 .id = -1,
64 .name = "sh-sci",
85 .name = "sh-sci",
112 .name = "ohci-platform",
113 .id = -1,
[all …]
H A Dsetup-sh770x.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on setup-sh7709.c
32 RTC, WDT, REF, enumerator
38 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
39 INTC_VECT(RTC, 0x4c0),
48 /* IRQ0->5 are handled in setup-sh3.c */
68 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
103 .name = "sh-rtc",
104 .id = -1,
120 .name = "sh-sci",
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7201.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2008 Peter Griffin pgriffin@mpc-data.co.uk
28 RTC, WDT, enumerator
88 INTC_IRQ(RTC, 152), INTC_IRQ(RTC, 153),
89 INTC_IRQ(RTC, 154),
159 { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
189 .name = "sh-sci",
209 .name = "sh-sci",
229 .name = "sh-sci",
249 .name = "sh-sci",
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H A Dsetup-sh7203.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2007 - 2009 Paul Mundt
36 /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
37 ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1, enumerator
107 INTC_IRQ(RTC, 231), INTC_IRQ(RTC, 232),
108 INTC_IRQ(RTC, 233),
116 /* SH7263-specific trash */
155 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } },
160 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
186 .name = "sh-sci",
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H A Dclock-sh7264.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh2a/clock-sh7264.c
28 /* Fixed 32 KHz root clock for RTC */
43 unsigned long rate = clk->parent->rate / pll1_div; in pll_recalc()
101 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
115 CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP77]),
116 CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP77]),
117 CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP77]),
118 CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP77]),
119 CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP77]),
[all …]
H A Dclock-sh7269.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh2a/clock-sh7269.c
25 /* Fixed 32 KHz root clock for RTC */
40 return clk->parent->rate * PLL_RATE; in pll_recalc()
55 return clk->parent->rate / 8; in peripheral0_recalc()
70 return clk->parent->rate / 4; in peripheral1_recalc()
135 [MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */
150 CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP47]),
151 CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP46]),
152 CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP45]),
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H A Dsetup-sh7269.c1 // SPDX-License-Identifier: GPL-2.0
46 RTC, enumerator
180 INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339),
181 INTC_IRQ(RTC, 340),
235 { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },
263 .name = "sh-sci",
287 .name = "sh-sci",
311 .name = "sh-sci",
335 .name = "sh-sci",
359 .name = "sh-sci",
[all …]
H A Dsetup-sh7264.c1 // SPDX-License-Identifier: GPL-2.0
42 NFMC, SDHI, RTC, enumerator
163 INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297),
164 INTC_IRQ(RTC, 298),
213 { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },
241 .name = "sh-sci",
265 .name = "sh-sci",
289 .name = "sh-sci",
313 .name = "sh-sci",
337 .name = "sh-sci",
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7734.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/cpu/sh4a/setup-sh7734.c
15 #include <linux/dma-mapping.h>
37 .name = "sh-sci",
58 .name = "sh-sci",
79 .name = "sh-sci",
100 .name = "sh-sci",
121 .name = "sh-sci",
142 .name = "sh-sci",
151 /* RTC */
[all …]
H A Dsetup-sh7780.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <cpu/dma-register.h>
30 .name = "sh-sci",
51 .name = "sh-sci",
72 .name = "sh-tmu",
93 .name = "sh-tmu",
105 .end = 0xffe80000 + 0x58 - 1,
116 .name = "sh-rtc",
117 .id = -1,
209 * vectors are 0x640-0x6a0, 0x780-0x7a0
[all …]
H A Dsetup-sh7763.c1 // SPDX-License-Identifier: GPL-2.0
31 .name = "sh-sci",
52 .name = "sh-sci",
73 .name = "sh-sci",
85 .end = 0xffe80000 + 0x58 - 1,
96 .name = "sh-rtc",
97 .id = -1,
120 .name = "ohci-platform",
121 .id = -1,
146 .id = -1,
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh4/
H A Dsetup-sh7750.c1 // SPDX-License-Identifier: GPL-2.0
21 .end = 0xffc80000 + 0x58 - 1,
32 .name = "sh-rtc",
33 .id = -1,
48 .name = "sh-sci",
68 .name = "sh-sci",
89 .name = "sh-tmu",
114 .name = "sh-tmu",
185 TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF, enumerator
195 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
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H A Dsetup-sh4-202.c1 // SPDX-License-Identifier: GPL-2.0
3 * SH4-202 Setup
31 .name = "sh-sci",
52 .name = "sh-tmu",
89 HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT, enumerator
96 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
97 INTC_VECT(RTC, 0x4c0),
104 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
110 static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
118 static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
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/openbmc/linux/arch/sh/kernel/
H A Dtime.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/time.c
7 * Copyright (C) 2002 - 2009 Paul Mundt
8 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
18 #include <linux/rtc.h>
20 #include <asm/rtc.h>
26 * Make sure all compiled-in early timers register themselves. in sh_late_time_init()
30 * that only a clockevents device is available, we -ENODEV on the in sh_late_time_init()
/openbmc/linux/arch/sh/boards/mach-dreamcast/
H A Drtc.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/boards/dreamcast/rtc.c
5 * Dreamcast AICA RTC routines.
12 #include <linux/rtc.h>
16 /* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in
21 /* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit
27 * aica_rtc_gettimeofday - Get the time from the AICA RTC
28 * @dev: the RTC device (ignored)
29 * @tm: pointer to resulting RTC time structure
31 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch.
[all …]
/openbmc/linux/arch/sh/boards/mach-sh03/
H A Drtc.c1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/sh/boards/sh03/rtc.c -- CTP/PCI-SH03 on-chip RTC support
16 #include <linux/rtc.h>
60 "SH-03 RTC: invalid value, resetting to 1 Jan 2000\n"); in sh03_rtc_gettimeofday()
79 tm->tm_sec = sec; in sh03_rtc_gettimeofday()
80 tm->tm_min = min; in sh03_rtc_gettimeofday()
81 tm->tm_hour = hour; in sh03_rtc_gettimeofday()
82 tm->tm_mday = day; in sh03_rtc_gettimeofday()
83 tm->tm_mon = mon; in sh03_rtc_gettimeofday()
84 tm->tm_year = year - 1900; in sh03_rtc_gettimeofday()
[all …]
/openbmc/linux/Documentation/arch/sh/
H A Dindex.rst11 new-machine
12 register-banks
19 SH-4
20 ----
25 .. kernel-doc:: arch/sh/kernel/cpu/sh4/sq.c
31 mach-dreamcast
32 --------------
34 .. kernel-doc:: arch/sh/boards/mach-dreamcast/rtc.c
37 mach-x3proto
38 ------------
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/openbmc/openbmc/meta-fii/meta-mori/recipes-mori/mori-sys-utility/mori-cmd/
H A Dmori.sh5 # shellcheck source=meta-fii/meta-mori/recipes-mori/mori-fw-utility/mori-fw/mori-lib.sh
6 source /usr/libexec/mori-fw/mori-lib.sh
10 echo " system --> reset the host"
11 echo " btn --> trigger a power button event"
12 echo " shutdown --> send out shutdown signal to CPU"
13 echo " display --> "
18 echo " on --> turn led on"
19 echo " off --> turn led off"
20 echo " toggle --> toggle led"
21 echo " status --> get status of led"
[all …]
/openbmc/openbmc/poky/meta/recipes-core/busybox/files/
H A Dhwclock.sh1 #!/bin/sh
4 # Required-Start:
5 # Required-Stop: $local_fs
6 # Default-Start: S
7 # Default-Stop: 0 6
8 # Short-Description: Set system clock
21 [ ! -x /sbin/hwclock ] && exit 0
23 [ -f /etc/default/rcS ] && . /etc/default/rcS
25 [ "$UTC" = "yes" ] && tz="--utc" || tz="--localtime"
36 if [ -z "$TZ" ]
[all …]
/openbmc/linux/arch/sh/include/mach-common/mach/
H A Dsecureedge5410.h1 /* SPDX-License-Identifier: GPL-2.0
3 * include/asm-sh/snapgear.h
5 * Modified version of io_se.h for the snapgear-specific functions.
19 * written :-|
22 * -----------------------------------------------
26 * D3 - WAN
28 * D5 - ONLINE
29 * D6 - VPN
30 * D7 - DTR on ttySC1
31 * D8 - ttySC0 RTS (7100)
[all …]

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